IP Library Granted Patent US 9,041,454
Granted Patent B2
US 9,041,454 · App. 13/835,377 · Granted May 26, 2015

Bias circuit for a switched capacitor level shifter

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Quick Facts
Patent No.
US 9,041,454
App. No.
13/835,377
Granted
May 26, 2015
Kind
B2
Abstract

A noise resistant switch control circuit is provided. The circuit includes a low pass filter configured to couple to a first terminal of a switch and a first voltage clamp coupled to the low pass filter. The first voltage clamp is configured to couple to a control terminal of the switch and limit a voltage of the control terminal relative to the first terminal to within a first clamping range. The circuit includes a second voltage clamp coupled to an input terminal of the switch control circuit. The second voltage clamp is configured to couple to the control terminal of the switch. The second voltage clamp is further configured to reduce a level of a control voltage coupled to the second voltage clamp. The circuit includes a bias device configured to couple to the control terminal of the switch and to impress a biasing voltage to the control terminal.

Claims (43)

1. A noise resistant, switch control circuit comprising:

a low pass filter configured to couple a low pass output of the low pass filter to a first terminal of a switch, the switch having the first terminal, a second terminal, and a control terminal;

a first voltage clamp coupled to the low pass filter, the first voltage clamp configured to couple to the control terminal of the switch and to limit a voltage of the control terminal relative to the first terminal to within a first clamping range;

a second voltage clamp coupled to an input terminal of the switch control circuit, the second voltage clamp configured to couple to the control terminal of the switch, the second voltage clamp further configured to reduce a level of a control voltage coupled to the second voltage clamp; and

a bias device configured to couple to the control terminal of the switch and to impress a biasing voltage to the control terminal.

2. The switch-control circuit of claim 1 , further comprising:

a coupler configured to block DC (direct current) while coupling the control voltage to the second voltage clamp.

3. The switch-control circuit of claim 2 , wherein the bias device is in cooperation with the coupler to form a further low pass filter.

4. The switch-control circuit of claim 1 , wherein the bias device is coupled to the low pass filter.

5. The switch-control circuit of claim 1 , wherein the switch includes a MOSFET (metal oxide semiconductor field effect transistor) having a gate as the control terminal of the switch.

6. The switch-control circuit of claim 1 , wherein the first voltage clamp includes first back-to-back Zener diodes and the second voltage clamp includes second back-to-back Zener diodes.

7. The switch-control circuit of claim 1 , wherein the low pass filter includes a resistor and a capacitor and the bias device includes a resistor coupled to an output of the low pass filter.

8. The switch-control circuit of claim 1 , wherein the first clamping range is determined by first back-to-back Zener diodes included in the first voltage clamp and a second clamping range is determined by second back-to-back Zener diodes included in the second voltage clamp.

9. A noise resistant switching device, comprising:

a switch having a first terminal, a second terminal and a control terminal, wherein the first terminal and the second terminal are coupled together in response to the control terminal being within an activation voltage range relative to the first terminal;

an AC (alternating current) coupling device having a first terminal as an input terminal of the noise-resistant switching device;

a first voltage clamp coupled to the control terminal and the first terminal of the switch, the first voltage clamp arranged to clamp a voltage of the control terminal to a first clamping voltage relative to the first terminal of the switch;

a second voltage clamp coupled to a second terminal of the AC coupling device, the second voltage clamp coupled to the control terminal of the switch, the second voltage clamp configured to urge a voltage of the control terminal towards a voltage on the second terminal of the AC coupling device in response to the voltage on the second terminal of the AC coupling device being greater in magnitude than a second clamping voltage;

a low pass filter having an output coupled to the first terminal of the switch; and

a bias device coupled to the control terminal and the first terminal of the switch.

10. The noise resistant switching device of claim 9 , wherein the AC coupling device includes a capacitor and the second voltage clamp includes back-to-back Zener diodes, the back-to-back Zener diodes being in series with the capacitor.

11. The noise resistant switching device of claim 9 , wherein the switch includes a P type MOSFET (metal oxide semiconductor field effect transistor), with a gate of the MOSFET acting as the control terminal of the switch and wherein the first voltage clamp includes back-to-back Zener diodes coupled across a source of the MOSFET and the gate of the MOSFET.

12. The noise resistant switching device of claim 9 , wherein the low pass filter includes a first resistor and a capacitor in series and the bias device includes a second resistor.

13. The noise resistant switching device of claim 9 , wherein the first clamping voltage is set by first back-to-back Zener diodes and the second clamping voltage is set by second back-to-back Zener diodes.

14. The noise resistant switching device of claim 9 , wherein the AC coupling device and the second voltage clamp are configured to receive an input signal at the input terminal of the noise resistant switching device, with the input signal having a peak-to-peak amplitude greater in magnitude than twice the second clamping voltage.

15. The noise resistant switching device of claim 9 , wherein the control terminal of the switch has a bias voltage imparted by the bias device in response to an input signal at the input terminal of the noise resistant switching device having a peak to peak amplitude lower in magnitude than twice the second clamping voltage.

16. The noise resistant switching device of claim 9 , wherein the switch and the bias device are configured to deactivate the switch in response to a clock signal being absent relative to the input terminal of the noise-resistant switching device.

17. A method for controlling a switch, the method comprising:

coupling a first terminal of a switch to an output of a low pass filter, the switch having the first terminal, a second terminal, and a control terminal;

biasing the control terminal of the switch to within one of an activating voltage range or a deactivating voltage range;

AC (alternating current) coupling an input signal, to produce an AC coupled version of the input signal;

voltage clamping the AC coupled version of the input signal, to produce a reduced AC coupled version of the input signal in response to the AC coupled version of the input signal exceeding a second clamping range;

voltage clamping the reduced AC coupled version of the input signal, to produce a voltage clamped AC coupled version of the input signal; and

applying the voltage clamped AC coupled version of the input signal to the control terminal of the switch.

18. The method of claim 17 , further comprising:

activating the switch in response to the control terminal of the switch being within the activating voltage range; and

deactivating the switch in response to the control terminal of the switch being within the deactivating voltage range.

19. The method of claim 17 , further comprising:

low pass filtering a voltage, using the low pass filter to produce a low pass filtered voltage; and

expressing the low pass filtered voltage on the first terminal of the switch.

20. The method of claim 17 , wherein:

the voltage clamping the AC coupled version includes producing the reduced, AC coupled version of the input signal as the AC coupled version of the input signal reduced by a first amplitude; and

the voltage clamping the reduced AC coupled version includes limiting the voltage clamped AC coupled version of the input signal to a second amplitude.

Assignments (8)
RELEASE OF SECURITY INTEREST Recorded Apr 5, 2019
From: AYAR THIRD INVESTMENT COMPANY
To: ATIEVA, INC.
Reel/Frame 048811/0472 →
SECURITY INTEREST Recorded Oct 5, 2018
From: ATIEVA, INC.
To: AYAR THIRD INVESTMENT COMPANY
Reel/Frame 047199/0221 →
RELEASE OF SECURITY INTEREST Recorded Sep 24, 2018
From: YINLONG ELECTRIC VEHICLE (HK) GROUP LIMITED
To: ATIEVA, INC.; ATIEVA USA, INC.; AVB METRICS, LLC
Reel/Frame 047620/0451 →
RELEASE OF SECURITY INTEREST Recorded Sep 13, 2018
From: TRINITY CAPITAL FUND III, L.P.
To: ATIEVA, INC.; ATIEVA USA, INC.; AVB METRICS, LLC
Reel/Frame 047529/0619 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 24, 2018
From: ATIEVA USA INC.
To: ATIEVA INC.
Reel/Frame 046696/0236 →
SECURITY INTEREST Recorded Nov 15, 2017
From: ATIEVA, INC.; ATIEVA USA, INC
To: YINLONG ELECTRIC VEHICLE (HK) GROUP LIMITED
Reel/Frame 044457/0942 →
INTELLECTUAL PROPERTY SECURITY AGREEMENT Recorded Mar 31, 2017
From: ATIEVA, INC
To: TRINITY CAPITAL FUND III, L. P.
Reel/Frame 042125/0897 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 27, 2014
From: BISKUP, RICHARD J.
To: ATIEVA, INC.
Reel/Frame 032055/0609 →