SECURE TESTING OF SEMICONDUCTOR DEVICE
A method includes testing, by a processor, a secure portion of a semiconductor device through a first interface between the processor and the semiconductor device; and sending, by the processor, a pass or fail indication of a result of the testing of the secure portion of the semiconductor device to the tester through a second interface between the processor and the tester.
1 . An apparatus, comprising:
a first interface configured to communicate with a semiconductor device;
a second interface configured to communicate with a tester; and
a processor configured to test a secure portion of the semiconductor device,
wherein the processor is configured to send a result of testing of the secure portion of the semiconductor device to the tester through the second interface.
2 . The apparatus of claim 1 , wherein the processor is configured to provide an encryption key into the secure portion, the encryption key being associated with a processing code.
3 . The apparatus of claim 1 , wherein the processor is configured to isolate the tester from the secure portion of the semiconductor device.
4 . The apparatus of claim 1 , wherein the processor includes a test key configured to facilitate testing of the secure portion.
5 . The apparatus of claim 1 , further comprising:
a relay switch configured to selectively allow communication between the tester and a non-secure portion of the semiconductor device.
6 . The apparatus of claim 5 , wherein the relay switch is configured to selectively allow the tester to test the non-secure portion of the semiconductor device.
7 . The apparatus of claim 5 , wherein the processor is configured to receive instructions from the tester to operate the relay switch.
8 . The apparatus of claim 5 , wherein the relay switch is configured to isolate the tester from the secure portion of the semiconductor device.
9 . The apparatus of claim 5 , wherein the communication between the tester and the non-secure portion of the semiconductor device passes through the first interface and the second interface.
10 . A method, comprising:
testing, by a processor, a secure portion of a semiconductor device through a first interface between the processor and the semiconductor device; and
sending, by the processor, a pass or fail indication of a result of the testing of the secure portion of the semiconductor device to the tester through a second interface between the processor and the tester.
11 . The method of claim 10 , further comprising:
providing, by the processor, an encryption key into the secure portion, the encryption key being associated with a processing code.
12 . The method of claim 10 , further comprising isolating the tester from the secure portion of the semiconductor device.
13 . The method of claim 10 , wherein the testing the secure portion comprises using a test key by the processor to facilitate testing the secure portion.
14 . The method of claim 10 , further comprising:
operating a relay switch to allow communication between the tester and a non-secure portion of the semiconductor device.
15 . The method of claim 14 , wherein operating the relay switch is responsive to receiving, by the processor, instructions from the tester to operate the relay switch.
16 . A computer program product, embodied on a non-transitory computer-readable medium, comprising:
computer code for testing a secure portion of a device by a processor; and
computer code for sending results of the testing from the processor to a tester, wherein the results include an indication of pass or fail, and wherein the tester is isolated from the secure portion of the device.
17 . The computer program product of claim 16 , further comprising:
computer code for allowing communication between the tester and a non-secure portion of the device.
18 . The computer program product of claim 17 , wherein the computer code for allowing communication between the tester and the non-secure portion of the device comprises:
computer code for operating a relay switch.
19 . The computer program product of claim 18 , further comprising:
computer code for receiving instructions from the tester to operate the relay switch.
20 . The computer program product of claim 16 , wherein the computer code for testing the secure portion comprises:
computer code for using a test key to facilitate testing the secure portion.