Electronic circuitry
Electronic circuitry comprising operational circuits of active switching type requiring timing signals, and conductive means for distributing said timing signals to the operational circuits, wherein the timing signal distribution means includes a signal path that has different phases of a drive signal are supplied via active means at different positions about the signal path where that path exhibits endless electro-magnetic continuity without signal phase inversion or has interconnections with another signal path having different substantially unidirectional signal flow where there is no endless electromagnetic continuity between those signal paths and generally has non-linear associated circuit means where the signal path is of a transmission line nature.
1. An apparatus comprising:
a differential transmission line in a closed loop, the differential transmission line including a first conductive trace, a second conductive trace, and an odd number of one or more cross-overs, wherein each of the one or more cross-overs is configured to reverse the polarity of a travelling wave propagating through the differential transmission line, wherein the polarity of the travelling wave reverses after the travelling wave completes a lap around the closed loop; and
a plurality of regenerative devices electrically connected along a path of the differential transmission line, wherein the plurality of regenerative devices are configured to provide energy to the travelling wave to compensate for losses associated with the differential transmission line.
2. The apparatus of claim 1 , wherein each of the plurality of regenerative devices comprises a first inverter and a second inverter, wherein the first inverter includes an input electrically connected to the first conductive trace and an output electrically connected to the second conductive trace, and wherein the second inverter includes an input electrically connected to the second conductive trace and an output electrically connected to the first conductive trace.
3. The apparatus of claim 1 , wherein the plurality of regenerative devices comprises at least 100 regenerative devices.
4. The apparatus of claim 3 , wherein the plurality of regenerative devices are distributed substantially evenly along the differential transmission line.
5. The apparatus of claim 1 , wherein the plurality of regenerative devices provide switching relative to a first power supply voltage and a second power supply voltage.
6. The apparatus of claim 1 , wherein the differential transmission line has no stable DC operating point.
7. An apparatus comprising:
a differential transmission line in a closed loop, the differential transmission line including a first conductive trace, a second conductive trace, and an odd number of one or more cross-overs, wherein each of the one or more cross-overs is configured to reverse the polarity of a wave propagating through the differential transmission line;
a plurality of regenerative devices electrically connected along a path of the differential transmission line, wherein the plurality of regenerative devices are configured to provide energy to the wave to compensate for losses associated with the differential transmission line; and
a first metal layer and a first dielectric layer disposed adjacent to a first side of the first and second conductive traces and a second metal layer and a second dielectric layer disposed adjacent to a second side of the first and second conductive traces, wherein the first metal layer is electrically connected to a first power supply voltage, and wherein the second metal layer is electrically connected to a second power supply voltage.
8. The apparatus of claim 1 , further comprising a plurality of shunt capacitors electrically connected along the differential transmission line.
9. The apparatus of claim 8 , wherein the plurality of shunt capacitors are digitally selectable.
10. The apparatus of claim 8 , wherein the plurality of shunt capacitors comprise a plurality of metal oxide semiconductor field effect transistors (MOSFETs).
11. The apparatus of claim 1 , wherein the differential transmission line is implemented as a microstrip.
12. The apparatus of claim 1 , further comprising a plurality of complementary metal oxide semiconductor (CMOS) tap inverters electrically connected along the differential transmission line, wherein the CMOS tap inverters are configured to generate a plurality of local clock signals.
13. The apparatus of claim 1 , wherein adjacent portions of the first and second conductive traces provide a differential clock signal.
14. An apparatus comprising:
a differential transmission line in a closed loop, the differential transmission line including a first conductive trace, a second conductive trace, and an odd number of one or more cross-overs, wherein each of the one or more cross-overs is configured to reverse the polarity of a travelling wave propagating through the differential transmission line, wherein the polarity of the travelling wave reverses after the travelling wave completes a lap around the closed loop; and
a means for regenerating electrically connected to the differential transmission line, wherein the regenerating means is configured to provide energy to the travelling wave to compensate for losses associated with the differential transmission line.
15. The apparatus of claim 14 , further comprising a first metal layer and a first dielectric layer disposed adjacent to a first side of the first and second conductive traces and a second metal layer and a second dielectric layer disposed adjacent to a second side the first and second conductive traces, wherein the first metal layer is electrically connected to a first power supply voltage, and wherein the second metal layer is electrically connected to a second power supply voltage.
16. The apparatus of claim 14 , further comprising a plurality of shunt capacitors electrically connected along the differential transmission line.
17. The apparatus of claim 16 , wherein the plurality of shunt capacitors are digitally selectable.
18. The apparatus of claim 16 , wherein the plurality of shunt capacitors comprise a plurality of metal oxide semiconductor field effect transistors (MOSFETs).
19. The apparatus of claim 14 , wherein the differential transmission line has no stable DC operating point.
20. The apparatus of claim 14 , further comprising a plurality of complementary metal oxide semiconductor (CMOS) tap inverters electrically connected along the differential transmission line, wherein the CMOS tap inverters are configured to generate a plurality of local clock signals.