LIGHT-EMITTING DIODE COMPRISING DIELECTRIC MATERIAL LAYER AND MANUFACTURING METHOD THEREOF
Disclosed is a light-emitting diode with a semiconductor layer including dielectric material layer, and a manufacturing method thereof for increasing the external quantum efficiency. The semiconductor layer includes a non-flat structure having a plurality of recess regions, and at least one dielectric material layer disposed within each recess region, the dielectric material layer has a generally inverted pyramid shape or a ball shape, and a portion of the non-flat structure is exposed outside the dielectric material layer. Photons emitted from the active layer are scattered by the dielectric material layer as photon scattering structure, and are guided by the inclined internal side faces of the recess regions so that the probability of photons escaping from the light-emitting diode is increased, and thus total internal reflection is reduced, thereby increasing the extraction efficiency and hence the external quantum efficiency.
1 . A light-emitting diode comprising:
a semiconductor layer comprising:
a first portion, wherein the top surface of said first portion is treated into a non-flat structure having a plurality of recess regions;
at least one dielectric material layer disposed within each recess region; and
a second portion disposed on said non-flat structure and said dielectric material layer,
wherein a portion of said non-flat structure is exposed outside said dielectric material layer.
2 . The light-emitting diode of claim 1 , wherein said semiconductor layer is disposed on a substrate.
3 . The light-emitting diode of claim 2 , wherein said substrate is selected from a substrate base, an epitaxial layer, a metal layer, or an active layer.
4 . The light-emitting diode of claim 2 , wherein said semiconductor layer is interposed between said substrate and an active layer.
5 . The light-emitting diode of claim 1 , wherein said semiconductor layer includes at least one material selected from the group comprising an element semiconductor and a compound semiconductor.
6 . The light-emitting diode of claim 1 , wherein said non-flat structure is irregular.
7 . The light-emitting diode of claim 1 , wherein said non-flat structure is regular or periodic.
8 . The light-emitting diode of claim 1 , wherein said recess regions have inclined internal side faces.
9 . The light-emitting diode of claim 1 , wherein said dielectric material layer includes at least one material with wide energy bandgap.
10 . The light-emitting diode of claim 1 , wherein the refractive index of said dielectric material layer is different from that of said first portion or said second portion of said semiconductor layer.
11 . The light-emitting diode of claim 1 , wherein said dielectric material layer includes at least one material selected from the group comprising silicon dioxide, silicon nitride, tantalum pentoxide, titanium dioxide, zinc oxide, hafnium oxide, magnesium peroxide, and magnesium nitride.
12 . The light-emitting diode of claim 1 , wherein said dielectric material layer has a generally inverted pyramid shape or a ball shape.
13 . A method for manufacturing a light-emitting diode, comprising:
forming a first portion of a semiconductor layer upon a substrate;
treating the top surface of said first portion of the semiconductor layer into a non-flat structure having a plurality of recess regions;
forming at least one dielectric material layer upon said non-flat structure;
reducing part of said dielectric material layer to expose a portion of said non-flat structure; and
forming a second portion of said semiconductor layer upon said non-flat structure and said dielectric material layer.
14 . The method of claim 13 , further comprising:
forming an active layer upon said semiconductor layer.
15 . The method of claim 13 , wherein said substrate is selected from a substrate base, an epitaxial layer, a metal layer, or an active layer.
16 . The method of claim 13 , wherein said semiconductor layer includes at least one material selected from the group comprising an element semiconductor and a compound semiconductor.
17 . The method of claim 13 , wherein said non-flat structure is irregular.
18 . The method of claim 13 , wherein said non-flat structure is regular or periodic.
19 . The method of claim 13 , wherein said recess regions have inclined internal side faces.
20 . The method of claim 13 , wherein said dielectric material layer includes at least one material with wide energy bandgap.
21 . The method of claim 13 , wherein the refractive index of said dielectric material layer is different from that of said first portion or said second portion of said semiconductor layer.
22 . The method of claim 13 , wherein said dielectric material layer includes at least one material selected from the group comprising silicon dioxide, silicon nitride, tantalum pentoxide, titanium dioxide, zinc oxide, hafnium dioxide, magnesium peroxide, and magnesium nitride.
23 . The method of claim 13 , wherein said dielectric material layer is reduced using an inductively coupled plasma reactive ion etching process.
24 . The method of claim 13 , wherein said dielectric material layer has a generally inverted pyramid shape or a ball shape.