IP Library Granted Patent US 9,000,805
Granted Patent B2
US 9,000,805 · App. 13/849,115 · Granted Apr 7, 2015

Resonant inductor coupling clock distribution

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Quick Facts
Patent No.
US 9,000,805
App. No.
13/849,115
Granted
Apr 7, 2015
Kind
B2
Abstract

The present disclosure provides for a clock distribution network for distributing clocking signals within a synchronous sequential logic circuit. The clock distribution network distributes the one or more clock signals by inductively and/or capacitively coupling a clocking signal from a primary distribution node to various secondary distribution nodes within the synchronous sequential logic circuit. The various secondary distribution nodes resonate at respective resonant frequencies to generate other clocking signals for use within the synchronous sequential logic circuit in response to receiving the clocking signal.

Claims (45)

1. A synchronous sequential logic system, comprising:

a sequential logic module configured to sequentially process a digital input signal in accordance with a plurality of clocking signals to provide a digital output signal;

a clock generator configured to provide a reference clock; and

a clock distribution network having a primary distribution node and a secondary distribution node, the primary distribution node being configured to couple the reference clock to the secondary distribution node, the secondary distribution node being configured to resonate at a resonant frequency in response to receiving the reference clock to provide the plurality of clocking signals.

2. The synchronous sequential logic system of claim 1 , wherein the sequential logic module comprises:

a plurality of digital logic components configured to be triggered by the plurality of clocking signals to sequentially operate upon the digital input signal to provide the digital output signal.

3. The synchronous sequential logic system of claim 1 , wherein the primary distribution node is configured to couple the reference clock to the secondary distribution node via mutual inductance between the primary distribution node and the secondary distribution node.

4. The synchronous sequential logic system of claim 1 , wherein the primary distribution node is configured to inductively couple the reference clock to the secondary distribution node.

5. The synchronous sequential logic system of claim 1 , wherein the primary distribution node is configured to capacitively couple the reference clock to the secondary distribution node.

6. The synchronous sequential logic system of claim 3 , wherein the secondary distribution node comprises:

a resonant tuning circuit configured to oscillate at the resonant frequency in response to the secondary distribution node receiving the reference clock to provide at least one of the plurality of clocking signals.

7. The synchronous sequential logic system of claim 6 , wherein the resonant tuning circuit comprises:

an inductance configured to receive the reference clock from the primary distribution node; and

a capacitance configured to be charged in response to the inductance receiving the reference clock.

8. The synchronous sequential logic system of claim 7 , wherein the resonant tuning circuit is further configured to oscillate at the resonant frequency once the capacitance is charged.

9. A clock distribution network for use within a synchronous sequential logic system, comprising:

a primary distribution node; and

a secondary distribution node,

wherein the primary distribution node is configured to inductively couple a reference clock to the secondary distribution node, and

wherein the secondary distribution node is configured to resonate at a resonant frequency in response to the inductive coupling of the reference clock to provide a clocking signal for the synchronous sequential logic system.

10. The clock distribution network of claim 9 , wherein the secondary distribution node is configured to inductively receive the reference clock via mutual inductance between the primary distribution node and the secondary distribution node.

11. The clock distribution network of claim 10 , wherein the primary distribution node and the secondary distribution node comprise a first inductance and a second inductance, respectively, and

wherein the secondary distribution node is further configured to inductively receive the reference clock from the primary distribution node via mutual inductance between the first inductance and the second inductance.

12. The clock distribution network of claim 9 , wherein the primary distribution node and the secondary distribution node comprise a first transmission line and a second transmission line, respectively, and

wherein the secondary distribution node is further configured to inductively receive the reference clock from the primary distribution node via inductive coupling between the first transmission line and the second transmission line.

13. A clock distribution network for use within a synchronous sequential logic system comprising:

a primary distribution node; and

a secondary distribution node,

wherein the primary distribution node is configured to capacitively couple a reference clock to the secondary distribution node, and

wherein the secondary distribution node is configured to resonate at a resonant frequency in response to the capacitive coupling of the reference clock to provide a clocking signal for the synchronous sequential logic system.

14. The clock distribution network of claim 13 , wherein the primary distribution node and the secondary distribution node each comprise a capacitance and an inductance, respectively, and

wherein the secondary distribution node is further configured to capacitively receive the reference clock from the primary distribution node via capacitive coupling between the capacitance of the primary distribution node and the capacitance of the secondary distribution node.

15. A secondary distribution node for use in a clock distribution network, comprising:

an inductance configured to inductively receive a reference signal from a magnetic field provided by a primary distribution node, and

a capacitance configured to be charged in response to the inductance inductively receiving the reference signal,

wherein the inductance and the capacitance are further configured to oscillate at a resonant frequency once the reference signal has sufficiently charged the capacitance to provide a clocking signal.

16. The secondary distribution node of claim 15 , wherein the magnetic field induces a current onto the inductance that is representative of the reference signal.

17. A secondary distribution node for use in a clock distribution network, comprising:

a capacitance configured to capacitively receive a reference signal from an electric field provided by a primary distribution node; and

an inductance configured to be charged in response to the capacitance capacitively receiving the reference signal,

wherein the inductance and the capacitance are further configured to oscillate at a resonant frequency once the reference signal has sufficiently charged the inductance to provide a clocking signal.

18. The secondary distribution node of claim 17 , wherein the electric field induces a voltage onto the capacitance that is representative of the reference signal.

19. The clock distribution network of claim 9 , wherein the secondary distribution node comprises:

a resonant tuning circuit configured to oscillate at a resonant frequency in response to the secondary distribution node inductively receiving the reference clock to provide the clocking signal.

20. The secondary distribution node of claim 17 , wherein the inductance and the capacitance are configured and arranged to form a resonant tuning circuit, the resonant tuning circuit being configured to oscillate at a resonant frequency in response to the inductance inductively receiving the reference signal to provide the clocking signal.

Assignments (7)
CORRECTIVE ASSIGNMENT TO CORRECT THE PATENT NUMBER 9,385,856 TO 9,385,756 PREVIOUSLY RECORDED AT REEL: 47349 FRAME: 001. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Mar 22, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 051144/0648 →
CORRECTIVE ASSIGNMENT TO CORRECT THE EFFECTIVE DATE PREVIOUSLY RECORDED ON REEL 047229 FRAME 0408. ASSIGNOR(S) HEREBY CONFIRMS THE THE EFFECTIVE DATE IS 09/05/2018. Recorded Oct 29, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047349/0001 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047229/0408 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: BROADCOM CORPORATION
Reel/Frame 041712/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 1, 2017
From: BROADCOM CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041706/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: BROADCOM CORPORATION
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037806/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 22, 2013
From: CHANG, DAVID; HUKKOO, AJAT
To: BROADCOM CORPORATION
Reel/Frame 030070/0303 →