Two-transistor pixel array
View Patent ↗A two-transistor (2T) pixel comprises a chemically-sensitive transistor (ChemFET) and a selection device which is a non-chemically sensitive transistor. A plurality of the 2T pixels may form an array, having a number of rows and a number of columns. The ChemFET can be configured in a source follower or common source readout mode. Both the ChemFET and the non-chemically sensitive transistor can be NMOS or PMOS device.
1. A device comprising:
a plurality of pairs of lines;
an array of pixels coupled to the plurality of pairs of lines, a given pixel in the array coupled to a first line and a second line of a given pair of lines, the given pixel comprising:
a chemically-sensitive field-effect transistor (chemFET) including a first terminal directly connected to the first line and directly connected to another chemically-sensitive field-effect transistor not in the given pixel, a second terminal, and a floating gate coupled to a passivation layer; and
a switch connected between the second terminal of the chemFET and the second line.
2. The device of claim 1 , further comprising a readout circuit for reading the given pixel, the readout circuit comprising:
a bias circuit to apply a bias voltage to one of the first and second lines of the given pair of lines, and to apply the select signal to turn on the switch; and
a sense circuit to read the given pixel based on a voltage on the other of the first and second lines of the given pair of lines.
3. The device of claim 2 , wherein the voltage indicates an ion-concentration of an analyte solution coupled to the chemFET of the given pixel.
4. The device of claim 2 , wherein the sense circuit includes a pre-charge circuit to pre-charge the other of the first and second lines of the given pair to a pre-charge voltage prior to a read interval for the given pixel.
5. The device of claim 2 , wherein the sense circuit includes a sample circuit to sample the voltage on the second line.
6. The device of claim 5 , wherein the sample circuit includes a sample and hold circuit to hold an analog value of the voltage on the second line, and an analog to digital converter to convert the analog value to a digital value.
7. The device of claim 5 , wherein the sample circuit includes an analog to digital converter to directly convert the voltage on the second line to a digital value.
8. The device of claim 2 , the bias circuitry includes a current source coupled to the other of the first and second lines of the selected pair to provide a bias current to the given pixel during a read interval for the given pixel.
9. The device of claim 2 , wherein the voltage on the other of the first and second lines is established based on a threshold voltage of the chemFET of the given pixel.
10. The device of claim 1 , wherein the first terminal of the chemFET is a drain terminal, and the second terminal of the chemFET is a source terminal.
11. The device of claim 1 , wherein the first terminal of the chemFET is a source terminal, and the second terminal of the chemFET is a drain terminal.