IP Library Granted Patent US 9,136,230
Granted Patent B2
US 9,136,230 · App. 13/852,411 · Granted Sep 15, 2015

IC package with integrated waveguide launcher

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Quick Facts
Patent No.
US 9,136,230
App. No.
13/852,411
Granted
Sep 15, 2015
Kind
B2
Abstract

Embodiments described herein include an integrated circuit (IC) device. For example, the IC device can include a substrate configured to be coupled to a printed circuit board (PCB), an IC die attached to the substrate, and a waveguide launcher formed on the substrate. The waveguide launcher is electrically coupled to the IC die through the substrate.

Claims (29)

1. An integrated circuit (IC) device, comprising:

a semiconductor substrate having an outer surface and being configured to be coupled to a printed circuit board (PCB), the semiconductor substrate having a cavity formed therein below the outer surface of the semiconductor substrate, the cavity having a sidewall and a planar surface, wherein the cavity is open at the outer surface of the semiconductor substrate;

an IC die attached to the outer surface of the semiconductor substrate;

a waveguide launcher formed on the semiconductor substrate, the waveguide launcher including a metal trace that passes through the sidewall and contacts the planar surface of the cavity,

wherein the waveguide launcher is electrically coupled to the IC die through the semiconductor substrate.

2. The IC device of claim 1 , further comprising a plurality of bumps that electrically couples the IC die to the outer surface of the semiconductor substrate.

3. The IC device of claim 1 , further comprising a plurality of wire bonds that electrically couples the IC die to the outer surface of the semiconductor substrate.

4. The IC device of claim 1 , further comprising a ground ring formed on the outer surface of the semiconductor substrate, the ground ring comprising a plurality of traces that together surround the cavity.

5. The IC device of claim 4 , further comprising a plurality of solder balls coupled to a second outer surface of the semiconductor substrate, wherein at least one of the plurality of solder balls is electrically coupled to the ground ring.

6. The IC device of claim 5 , wherein the semiconductor substrate comprises at least one via that electrically couples the at least one of the plurality of solder balls to the ground ring.

7. The IC device of claim 1 , further comprising the PCB, the PCB being coupled to the semiconductor substrate.

8. The IC device of claim 7 , further comprising a chassis coupled to the PCB.

9. The IC device of claim 8 , wherein the chassis comprises a cavity that substantially corresponds with the cavity of the semiconductor substrate.

10. The IC device of claim 9 , wherein the PCB comprises an opening that substantially corresponds with the cavity of the chassis and the cavity of the semiconductor substrate.

11. The IC device of claim 7 , further comprising a housing coupled to the PCB.

12. The IC device of claim 11 , wherein the housing comprises a waveguide formed therein, wherein the waveguide launcher is configured to radiate into the waveguide.

13. The IC device of claim 11 , wherein the housing comprises a screw hole that is aligned with a screw hole formed in the PCB.

14. The IC device of claim 13 , further comprising a chassis coupled to the PCB, wherein the chassis comprises a screw hole that is aligned with the screw hole of the housing and the screw hole of the PCB.

15. The IC device of claim 11 , wherein the housing comprises a heat spreader that is in thermal contact with the IC die.

16. A method of manufacturing an integrated circuit (IC) device, comprising:

forming a waveguide launcher in a cavity of a semiconductor substrate, the cavity being formed in the semiconductor substrate beneath an outer surface of the semiconductor substrate and having a sidewall and a planar surface, wherein the semiconductor substrate is configured to be coupled to a printed circuit board (PCB), wherein the cavity is open at the outer surface of the semiconductor substrate and wherein the waveguide launcher includes a metal trace that passes through the sidewall and contacts the planar surface of the cavity; and

coupling an IC die to the outer surface of the semiconductor substrate, wherein the IC die is electrically coupled to the waveguide launcher through the semiconductor substrate.

17. The method of claim 16 , further comprising:

coupling the IC die to the PCB.

18. The method of claim 17 , further comprising:

coupling a chassis to the PCB.

19. The method of claim 17 , further comprising:

coupling a housing to the PCB.

20. The IC device of claim 1 , wherein a depth of the cavity is approximately equal to a quarter of a wavelength at which the waveguide launcher is configured to transmit radiation.

Assignments (5)
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: BROADCOM CORPORATION
Reel/Frame 041712/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 5, 2016
From: BROADCOM CORPORATION
To: MAXLINEAR ASIA SINGAPORE PRIVATE LIMITED
Reel/Frame 039356/0346 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN CERTAIN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (037806/0001) Recorded Jul 1, 2016
From: BANK OF AMERICA, N.A., AS ADMINISTRATIVE AND COLLATERAL AGENT
To: BROADCOM CORPORATION
Reel/Frame 039235/0401 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: BROADCOM CORPORATION
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037806/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 28, 2013
From: DEMIN, SERGEI; KLEIN, SHAUL; KUSHNIR, IGAL YEHUDA
To: BROADCOM CORPORATION
Reel/Frame 030107/0628 →