IP Library Granted Patent US 8,779,574
Granted Patent B1
US 8,779,574 · App. 13/854,898 · Granted Jul 15, 2014

Semiconductor die including a current routing line having non-metallic slots

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Quick Facts
Patent No.
US 8,779,574
App. No.
13/854,898
Granted
Jul 15, 2014
Kind
B1
Abstract

A semiconductor die that includes a plurality of non-metallic slots that extend through a current routing line is disclosed. The semiconductor die comprises a semiconductor circuit that includes a plurality of semiconductor components and a current trace line that is coupled to a first semiconductor component. Further, the semiconductor die comprises a current routing line that is coupled with the current trace line. The current routing line includes a plurality of non-metallic slots that extend through the current routing line.

Claims (56)

1. A semiconductor die comprising:

a semiconductor circuit comprising a plurality of semiconductor components the plurality of semiconductor components comprising a first semiconductor component;

a current trace line coupled to the first semiconductor component;

a current routing line coupled to the current trace line; and

a corner area of the current routing line that includes:

a first row of non-metallic slots that are equally-spaced from one another; and

a second row of non-metallic slots that are equally-spaced from one another,

wherein the non-metallic slots of the first and the second rows do not extend out of the corner area, and

wherein the first row of non-metallic slots runs parallel to the second row of non-metallic slots and the non-metallic slots of the first and the second rows are spaced from one another to allow for current flow through the corner area.

2. The semiconductor die of claim 1 , wherein the plurality of non-metallic slots are filled with a protective coating.

3. The semiconductor die of claim 2 , wherein the protective coating is an organic overcoat.

4. The semiconductor die of claim 1 , wherein the current routing line is a top metallic layer.

5. The semiconductor die of claim 4 , wherein the current routing line comprises Copper (Cu).

6. The semiconductor die of claim 5 , wherein the current routing line further comprises Nickel Palladium (NiPd).

7. The semiconductor die of claim 1 , wherein the current routing line is a power bus.

8. The semiconductor die of claim 7 , further comprising a pin connected to the power bus, the pin connecting the semiconductor circuit through the power bus to an external device.

9. The semiconductor die of claim 1 , wherein the corner area includes rounded edges.

10. The semiconductor die of claim 9 , wherein the corner area is wider than the current routing line outside of the corner area.

11. The semiconductor die of claim 1 , wherein the non-metallic slots are approximately rectangular shaped.

12. A system comprising:

a data storage device; and

a semiconductor die coupled to the data storage device, the semiconductor die including:

a semiconductor circuit comprising a plurality of semiconductor components the plurality of semiconductor components comprising a first semiconductor component,

a current trace line coupled to the first semiconductor component,

a current routing line coupled to the current trace line, and

a corner area of the current routing line that includes:

a first row of non-metallic slots that are equally-spaced from one another and

a second row of non-metallic slots that are equally-spaced from one another,

wherein the non-metallic slots of the first and the second rows do not extend out of the corner area, and

wherein the first row of non-metallic slots runs parallel to the second row of non-metallic slots and the non-metallic slots of the first and the second rows are spaced from one another to allow for current flow through the corner area.

13. The system of claim 12 , wherein the data storage device is a disk drive.

14. The system of claim 12 , wherein the data storage device is a flash memory.

15. The system of claim 12 , wherein the plurality of non-metallic slots are filled with a protective coating.

16. The system of claim 15 , wherein the protective coating is an organic overcoat.

17. The system of claim 12 , wherein the current routing line is a top metallic layer.

18. The system of claim 17 , wherein the current routing line comprises Copper (Cu).

19. The system of claim 18 , wherein the current routing line further comprises Nickel Palladium (NiPd).

20. The system of claim 12 , wherein the current routing line is a power bus.

21. The system of claim 20 , further comprising a pin connected to the power bus, the pin connecting the semiconductor circuit through the power bus to an external device.

22. The system of claim 12 , wherein the corner area includes rounded edges.

23. The system of claim 12 , wherein the corner area is wider than the current routing line outside of the corner area.

24. The system of claim 12 , wherein the non-metallic slots are approximately rectangular shaped.

25. A method for forming a plurality of non-metallic slots in a semiconductor die comprising:

coupling a current trace line to a first semiconductor component of the semiconductor die;

coupling a current routing line to the current trace line; and

forming a plurality of non-metallic slots in a corner area of the current routing line of the semiconductor die,

wherein the corner area of the current routing line includes:

a first row of non-metallic slots that are equally-spaced from one another; and

a second row of non-metallic slots that are equally-spaced from one another,

wherein the non-metallic slots of the first and the second rows do not extend out of the corner area, and

wherein the first row of non-metallic slots runs parallel to the second row of non-metallic slots and the non-metallic slots of the first and the second rows are spaced from one another to allow for current flow through the corner area.

26. The method of claim 25 , further comprising filling the plurality of non-metallic slots with a protective coating.

27. The method of claim 26 , wherein the protective coating is an organic overcoat.

28. The method of claim 25 , wherein the current routing line is a top metallic layer.

29. The method of claim 28 , wherein the current routing line comprises Copper (Cu).

30. The method of claim 29 , wherein the current routing line further comprises Nickel Palladium (NiPd).

Assignments (8)
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
RELEASE OF SECURITY INTEREST AT REEL 038744 FRAME 0481 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 058982/0556 →
RELEASE OF SECURITY INTEREST Recorded Mar 5, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 045501/0714 →
SECURITY AGREEMENT Recorded May 17, 2016
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 038744/0481 →
SECURITY AGREEMENT Recorded May 17, 2016
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 038722/0229 →
SECURITY AGREEMENT Recorded May 17, 2016
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038744/0281 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 1, 2013
From: AGNESS, JOHN R.; GU, MINGYING
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 030127/0495 →