Computer language translation filter
View Patent ↗Provided herein are devices, systems, methods and various means, including those related to translating command and other types of computer instructions being transmitted to a destination processor from a language that is non-native to the destination processor to a language that is native to the destination processor. Some embodiments discussed herein can include a processing filter that is configured to identify whether incoming instructions are formatted in a translatable non-native language of the destination processor and, if so, process the non-native commands into native commands. The processed, native commands can then be relayed to the destination processor by some embodiments discussed herein. The processing filter can be implemented in a manner that is portable and independent of any specific framework and/or programming language. For example, the processing functionality (including the identification and translation features discussed herein) can be implemented in the same device as the destination processor and/or at a system remote from the destination device (e.g., at a remote host system).
1. A method of processing data comprising:
receiving data from a host machine that is formatted in a first language via a first logical channel, wherein the data comprises instructions to be executed by circuitry of a destination machine;
determining, by a processor, whether to translate the data;
in response to determining the data is to be outputted without being translated:
providing the data as formatted in the first language to the circuitry of the destination machine via a second logical channel; and
generating a filter bypass indicator associated with the host machine, wherein the filter bypass indicator is configured to cause return data to bypass a translation filter via a third logical channel when the return data is generated by the destination machine for the host machine.
2. The method of claim 1 , wherein determining whether to translate the data comprises determining whether the first language is recognized as being translatable by the processor.
3. The method of claim 1 , wherein determining whether to translate the data comprises determining whether the first language is a native language of the destination device.
4. The method of claim 1 , wherein receiving the data formatted in the first language via the first logical channel comprises receiving the data as a STDIN data stream.
5. The method of claim 1 , wherein providing the data to the circuitry via the second logical channel comprises providing the data as a STDOUT data stream.
6. The method of claim 1 further comprising:
generating internal communications data to communicate with the circuitry of the destination machine;
providing the internal communications data to the destination machine via a third logical channel; and
receiving internal response data from the circuitry via a fourth logical channel.
7. The method of claim 6 , wherein providing the internal communications data to the destination machine via the third logical channel comprises providing the internal communications data as a SYSIN data stream.
8. The method of claim 7 , wherein receiving the internal response data from the circuitry via the fourth logical channel comprises receiving the internal communications data as a SYSOUT data stream.
9. The method of claim 1 further comprising:
receiving the return data from the destination machine for the host machine;
in response to receiving the return data from the destination machine, determining the filter bypass indicator is associated with the host machine; and
in response to determining the filter bypass indicator is associated with the host machine, facilitating the return data being provided to the host machine by bypassing a translational filter.
10. a method of processing data comprising:
receiving data formatted in a first language via a first logical channel, wherein the data is from a host machine and includes to be executed by a circuitry of a destination machine;
determining, by a processor, whether the first language is recognized as being translatable;
in response to determining the first language is recognized as being translatable, identifying the instructions included in the data;
generating new data in a native language that is supported by the circuitry of the destination machine, wherein the new data includes the instructions in the native language;
providing the new data to the circuitry of the destination machine over a second logical channel;
generating internal communications data to communicate with circuitry of the destination machine;
providing the internal communications data to the destination machine via a third logical channel;
receiving internal response data from the circuitry via a fourth logical channel; and
providing a fifth logical channel configured to provide unfiltered return data generated by the destination machine in response to the destination machine being configured to generate the unfiltered return data in a host language format that the host machine is configured to interpret.
11. The method of claim 10 further comprising providing a sixth logical channel configured to provide return data generated by the destination machine in response to the new data, wherein the return data is directed to the host machine.
12. The method of claim 11 further comprising translating the return data to be formatted in accordance with the first language.
13. The method of claim 12 further comprising outputting the return data as formatted in accordance with the first language via a STDERR data stream.
14. The method of claim 10 , wherein receiving the data formatted in the first language via the first logical channel comprises receiving the data via a STDIN data stream.
15. The method of claim 10 , wherein providing the new data to the circuitry over the second logical channel comprises providing the new data via a STDOUT data stream.
16. An apparatus, comprising:
a translation processor configured to:
receive data formatted in a first language via a first logical channel, wherein the data is from a host machine and includes instructions to be executed by circuitry of a destination machine;
determine whether to translate the data;
in response to determining the data is to be outputted without being translated:
provide the data as formatted in the first language to the circuitry of the destination machine via a second logical channel; and
generate a filter bypass indicator associated with the host machine, wherein the filter bypass indicator is configured to cause return data to bypass a translation filter via a third logical channel when the return data is generated by the destination machine for the host machine.
17. The apparatus of claim 16 , wherein the translation processor is further configured to:
receive the return data from the destination machine for the host machine;
in response to receiving the return data from the destination machine, determine the filter bypass indicator is associated with the host machine; and
in response to determining the filter bypass indicator is associated with the host machine, facilitate the return data being provided to the host machine by bypassing a translational filter.
18. The apparatus of claim 16 , wherein the translation processor is further configured to:
receive un-translated data formatted in a non-native language via the first logical channel, wherein the un-translated data is from a second host machine and includes un-translated instructions to be executed by the circuitry of the destination machine;
determine the non-native language is unsupported by the circuitry of the destination machine;
in response to determining the non-native language is unsupported by the circuitry of the destination machine, identifying the instructions included in the un-translated data;
generate translated data in a native language that is supported by the circuitry of the destination machine, wherein the new data includes translated instructions in the native language that correspond to the un-translated instructions; and
provide the translated data to the circuitry of the destination machine over the second logical channel.
19. The apparatus of claim 18 , wherein the translation processor is further configured to provide a fourth logical channel configured to provide native return data generated by the destination machine in response to the translated data, wherein the native return data is directed to the second host machine.
20. The apparatus of claim 19 , wherein the translation processor is further configured to translate the native return data to be formatted in accordance with the non-native language of the second host machine.
21. The apparatus of claim 16 , wherein the translation processor is further configured to provide two additional internal logical channels configured to conduct internal communications with the circuitry of the destination machine.
22. The apparatus of claim 16 , wherein the translation processor is embedded in the destination machine.
23. The apparatus of claim 16 , wherein the translation processor is located remote from the destination machine.