Trans-impedance amplifier for high speed optical-electrical interfaces
The differential trans-impedance amplifier uses trans-resistance(s) connected between the input nodes of a first differential amplifier, to implement a trans-impedance differential amplifier in a differential fashion and has two identical resistances, each connected between the photodiode and a respective DC voltage rail of a common bias network of the photodiode adapted to reverse bias the photodiode. The biasing resistances may be much larger than the trans-resistance(s) to prevent drawing any significant signal current from the photodiode. The amplifier may retain the advantages of a classical differential topology while effectively overcoming drawbacks that arise in high data rate applications.
1. A differential trans-impedance amplifier circuit comprising:
an amplifier having a pair of input nodes and configured to generate an amplified replica of a differential voltage on said pair of input nodes;
a photodiode;
a pair of DC-blocking capacitors coupling said photodiode to said pair of input nodes;
at least one trans-resistance coupled between said pair of input nodes of said amplifier; and
a bias network comprising two identical photodiode biasing resistances each greater than said at least one trans-resistance each photodiode biasing resistance coupled in series between said photodiode and a respective DC voltage.
2. The differential trans-impedance amplifier circuit of claim 1 , wherein said at least one trans-resistance comprises a pair of trans-resistances.
3. The differential trans-impedance amplifier circuit of claim 1 , wherein said pair of identical trans-resistances comprises a pair of identical trans-resistances.
4. The differential trans-impedance amplifier circuit of claim 2 , wherein each of said pair of trans-resistances is coupled to a respective one of said input nodes of said amplifier.
5. The differential trans-impedance amplifier circuit of claim 2 , further comprising at least one peaking inductor coupled in series between said pair of trans-resistances.
6. The differential trans-impedance amplifier circuit of claim 5 , wherein said at least one peaking inductor comprises a midpoint tap.
7. The differential trans-impedance amplifier circuit of claim 6 , further comprising at least one electrostatic protection device coupled to said midpoint tap.
8. The differential trans-impedance amplifier circuit of claim 5 , wherein said at least one peaking inductor comprises a pair thereof coupled in series, and defining a midpoint tap therebetween.
9. The differential trans-impedance amplifier circuit of claim 8 , further comprising at least one electrostatic protection device coupled to said midpoint tap.
10. The differential trans-impedance amplifier circuit of claim 1 , wherein said at least one said trans-resistance has a programmable value.
11. The differential trans-impedance amplifier circuit of claim 1 , further comprising a control loop configured to maintain a constant reverse bias voltage on said photodiode upon changing operating conditions.
12. An electronic device comprising:
an amplifier having a pair of input nodes and configured to generate an amplified replica of a voltage on said pair of input nodes;
a photodiode;
a pair of DC-blocking capacitors coupling said photodiode to said pair of input nodes;
at least one trans-resistance coupled between said pair of input nodes of said amplifier; and
a bias network comprising two photodiode biasing resistances each greater than said at least one trans-resistance each photodiode biasing resistance coupled in series between said photodiode and a respective voltage.
13. The electronic device of claim 12 , wherein said at least one trans-resistance comprises a pair of trans-resistances.
14. The electronic device of claim 13 , wherein said pair of identical trans-resistances comprises a pair of identical trans-resistances.
15. The electronic device of claim 13 , wherein each of said pair of trans-resistances is coupled to a respective one of said input nodes of said amplifier.
16. The electronic device of claim 13 , further comprising at least one peaking inductor coupled in series between said pair of trans-resistances.
17. The electronic device of claim 16 , wherein said at least one peaking inductor comprises a midpoint tap.
18. The electronic device of claim 17 , further comprising at least one electrostatic protection device coupled to said midpoint tap.
19. The electronic device of claim 16 , wherein said at least one peaking inductor comprises a pair thereof coupled in series, and defining a midpoint tap therebetween.
20. The electronic device of claim 19 , further comprising at least one electrostatic protection device coupled to said midpoint tap.
21. The electronic device of claim 12 , wherein said at least one said trans-resistance has a programmable value.
22. The electronic device of claim 12 , further comprising a control loop configured to maintain a constant reverse bias voltage on said photodiode upon changing operating conditions.
23. A method comprising:
generating an amplified replica of a voltage on a pair of input nodes of an amplifier coupled to a photodiode via a pair of DC-blocking capacitors, with at least one trans-resistance coupled between the pair of input nodes of the amplifier; and
reverse biasing the photodiode using a bias network comprising two photodiode biasing resistances each greater than the at least one trans-resistance, each photodiode biasing resistance coupled in series between the photodiode and a respective voltage.
24. The method of claim 23 , wherein the at least one trans-resistance comprises a pair of trans-resistances.
25. The method of claim 24 , wherein the pair of identical trans-resistances comprises a pair of identical trans-resistances.
26. The method of claim 23 , wherein each of the pair of trans-resistances is coupled to a respective one of the input nodes of the amplifier.
27. The method of claim 23 , wherein the at least one the trans-resistance has a programmable value.
28. The method of claim 23 , further comprising maintaining a constant reverse bias voltage on the photodiode upon changing operating conditions.