IP Library Granted Patent US 8,797,343
Granted Patent B1
US 8,797,343 · App. 13/866,344 · Granted Aug 5, 2014

Methods and apparatuses for processing cached image data

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Quick Facts
Patent No.
US 8,797,343
App. No.
13/866,344
Granted
Aug 5, 2014
Kind
B1
Abstract

Methods, software, and apparatuses for graphics processing, including caching pixel data of one or more tiles of a graphics surface. Methods generally include setting a caching bit corresponding to the surface, setting tile pattern bits corresponding to tiles in the surface, and when the caching bit is active, storing one or more pixel values in a cache memory. When at least one tile contains pixels having the same value for at least one predetermined parameter, the caching bit and the corresponding tile pattern bits may be active. Apparatuses generally include a pixel memory, a cache memory, and a controller including logic configured to reserve the caching bit, tile pattern bits, and same pixel values in cache memory when the caching bit is active.

Claims (48)

1. An imaging apparatus for processing a graphics surface, wherein the graphics surface is defined by an array of tiles represented by a plurality of tile pattern bits, and wherein each tile of the array of tiles comprises a plurality of pixels, the imaging apparatus comprising:

a cache memory configured to store values related to the pluralities of pixels of the tiles of the array of tiles, wherein each value corresponds to a color of a particular pixel; and

a processor configured to

determine that all pixels of the plurality of pixels of a particular tile have a same value thereby indicating that all pixels of the plurality of pixels of the particular tile are a same color, and

in response to determining that all pixels of the plurality of pixels of the particular tile have the same value, set a tile pattern bit of the plurality of tile pattern bits to an active state, wherein the tile pattern bit corresponds to the particular tile.

2. The imaging apparatus of claim 1 , wherein the processor is further configured to:

determine that the tile pattern bit corresponding to the particular tile is in the active state; and

in response determining that the bit corresponding to the particular tile is in an active state, read, from the cache memory, a single pixel value corresponding to the same value of the plurality of pixels of the particular tile.

3. The imaging apparatus of claim 2 , wherein the processor is further configured to:

write, to a pixel memory, the tile pattern bit corresponding to the particular tile; and

write, to the pixel memory, the single pixel value,

wherein the pixel memory is configured to store values related to colors of the plurality of pixels of the tiles of the graphics surface for further use.

4. The imaging apparatus of claim 3 , wherein the further use comprises one or more of (i) subsequent displaying of the particular tile, (ii) one or more mathematical operations on the particular tile, and/or (iii) graphics processing of the particular tile.

5. The imaging apparatus of claim 1 , wherein the processor is configured to determine that all pixels of the plurality of pixels of the particular tile have the same value by performing a mathematical correlation algorithm on the particular tile.

6. The imaging apparatus of claim 1 , wherein the processor is further configured to set the tile pattern bits to an initial state.

7. The imaging apparatus of claim 1 , wherein the processor is further configured to set the values related to colors of the plurality of pixels of the tiles of the graphics surface to an initial state.

8. A method for processing a graphics surface, wherein the graphics surface is defined by an array of tiles represented by a plurality of tile pattern bits, and wherein each tile of the array of tiles comprises a plurality of pixels, the method comprising:

storing, in a cache memory, values related to the pluralities of pixels of the tiles of the array of tiles, wherein each value corresponds to a color of a particular pixel;

determining, by a processor, that all pixels of the plurality of pixels of a particular tile have a same value thereby indicating that all pixels of the plurality of pixels of the particular tile are a same color; and

in response to determining that all pixels of the plurality of pixels of the particular tile have the same value, setting, by the processor, a tile pattern bit of the plurality of tile pattern bits to an active state, wherein the tile pattern bit corresponds to the particular tile.

9. The method of claim 8 , further comprising:

determining, by the processor, that the tile pattern bit corresponding to the particular tile is in the active state; and

in response determining that the bit corresponding to the particular tile is in an active state, reading, from the cache memory, a single pixel value corresponding to the same value of the plurality of pixels of the particular tile.

10. The method of claim 9 , further comprising:

writing, to a pixel memory, the tile pattern bit corresponding to the particular tile; and

writing, to the pixel memory, the single pixel value,

wherein the pixel memory is configured to store values related to colors of the plurality of pixels of the tiles of the graphics surface for further use.

11. The method of claim 10 , wherein the further use comprises one or more of (i) subsequent displaying of the particular tile, (ii) one or more mathematical operations on the particular tile, and/or (iii) graphics processing of the particular tile.

12. The method of claim 8 , wherein determining that all pixels of the plurality of pixels of the particular tile have the same value comprises performing a mathematical correlation algorithm on the particular tile.

13. The method of claim 8 , further comprising:

setting at least one of (i) the tile pattern bits to an initial state and/or (ii) the values related to colors of the plurality of pixels of the tiles of the graphics surface to an initial state.

14. An apparatus for processing a graphics surface, wherein the graphics surface is defined by an array of tiles represented by a plurality of tile pattern bits, and wherein each tile of the array of tiles comprises a plurality of pixels, wherein the apparatus comprises:

a processor; and

a computer-readable storage medium, wherein instructions are tangibly stored on the computer-readable storage medium, wherein the instructions are executable by the processor to enable the processor to

store, on a cache memory, values related to the pluralities of pixels of the tiles of the array of tiles, wherein each value corresponds to a color of a particular pixel,

determine that all pixels of the plurality of pixels of a particular tile have a same value thereby indicating that all pixels of the plurality of pixels of the particular tile are a same color, and

in response to determining that all pixels of the plurality of pixels of the particular tile have the same value, set a tile pattern bit of the plurality of tile pattern bits to an active state, wherein the tile pattern bit corresponds to the particular tile.

15. The apparatus of claim 14 , wherein the instructions are further executable by the processor to enable the processor to:

determine that the tile pattern bit corresponding to the particular tile is in the active state; and

in response determining that the bit corresponding to the particular tile is in an active state, read, from the cache memory, a single pixel value corresponding to the same value of the plurality of pixels of the particular tile.

16. The apparatus of claim 15 , wherein the instructions are executable by the processor to enable the processor to:

write, to a pixel memory, the tile pattern bit corresponding to the particular tile; and

write, to the pixel memory, the single pixel value,

wherein the pixel memory is configured to store values related to colors of the plurality of pixels of the tiles of the graphics surface for further use.

17. The apparatus of claim 16 , wherein the further use comprises one or more of (i) subsequent displaying of the particular tile, (ii) one or more mathematical operations on the particular tile, and/or (iii) graphics processing of the particular tile.

18. The apparatus of claim 14 , wherein the instructions are executable by the processor to enable the processor to determine that all pixels of the plurality of pixels of the particular tile have the same value by performing a mathematical correlation algorithm on the particular tile.

19. The apparatus of claim 14 , wherein the instructions are further executable by the processor to enable the processor to set the tile pattern bits to an initial state.

20. The apparatus of claim 14 , wherein the instructions are further executable by the processor to enable the processor to set the values related to colors of the plurality of pixels of the tiles of the graphics surface to an initial state.

Assignments (2)
SECURITY INTEREST Recorded Sep 27, 2017
From: SYNAPTICS INCORPORATED
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 044037/0896 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 19, 2017
From: MARVELL INTERNATIONAL LTD.
To: SYNAPTICS INCORPORATED; SYNAPTICS LLC
Reel/Frame 043853/0827 →