IP Library Granted Patent US 9,569,695
Granted Patent B2
US 9,569,695 · App. 13/869,656 · Granted Feb 14, 2017

Adaptive search window control for visual search

Inventors: Danilo Pietro Pau (Sesto San Giovanni, IT); Paolo Pasteris (Occhieoppo Inferiore, IT); Mirko Falchetto (Milzano, IT)
Assignee: STMicroelectronics S.r.l.
G06K9/6228G06K9/32G06K9/46G06T7/0028G06T7/2033H04N19/57G06K2009/363
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,569,695
App. No.
13/869,656
Granted
Feb 14, 2017
Kind
B2
Abstract

Image-processing apparatus and methods to adaptively control a size and/or location of a visual search window used for feature matching in a machine-vision system are described. A search window controller may receive motion vector data and image recognition rate data, and compute a search window size and/or search window location based on the received data. The computed search window size may be a portion of an image frame. The motion vector data and image recognition rate data may be computed from one or more images in a video image sequence. By adaptively controlling search window size and location, an appreciable reduction in data processing burden for feature matching may be achieved.

Claims (156)

1. An image processing system, comprising:

one or more memories; and

image processing circuitry, which, in operation:

controls a search window location of a search window associated with an image frame based on a motion vector associated with a sub-region of a previously processed image frame; and controls a size and shape of the search window in response to a determined recognition rate, wherein the image processing circuitry, in operation, controls horizontal and vertical dimensions of the search window based on the motion vector associated with the sub-region of the previously processed image frame, according to:

N

h

=

K

k

×

f

(

V

h

,

N

-

1

)

R

q

;

and

N

v

=

K

v

×

f

(

V

v

,

N

-

1

)

R

q

,

where N h is a horizontal size in pixels or sub-regions, N v is a vertical size in pixels or sub-regions, K h is a horizontal scaling constant, K v is a vertical scaling constant, f(V h, N−1 ) represents a functional dependency on a horizontal magnitude of the motion vector associated with the sub-region of the previously processed image frame, f(V v, N−1 ) represents a functional dependency on a vertical magnitude of the motion vector associated with the sub-region of the previously processed image frame, and R q represents the determined recognition rate.

2. The image processing system of claim 1 , wherein the image processing circuitry comprises a field-programmable gate array.

3. The image processing system of claim 1 wherein the determined recognition rate is based on feature matching.

4. The image processing system of claim 1 wherein the image processing circuitry, in operation, encodes received video data and computes the motion vector.

5. The image processing system of claim 4 wherein the image processing circuitry, in operation, encodes video data according to a standardized format.

6. The image processing system of claim 5 , wherein the standardized format comprises a MPEG or H264 format.

7. The image processing system of claim 1 wherein the image processing circuitry, in operation:

retrieves feature data from the one or more memories based upon the size of the search window; and

matches feature data for at least one feature of the image frame associated with the window against the feature data retrieved from the buffer.

8. The image processing system of claim 7 wherein the image processing circuitry, in operation, outputs optical flow data based upon matching results of feature data.

9. The image processing system of claim 7 , comprising:

an integrated circuit including the one or more memories and the image processing circuitry, wherein the one or more memories include a buffer, which, in operation, stores feature data.

10. A method, comprising:

controlling, using image processing circuitry, a search window location of a search window associated with an image frame based on a motion vector associated with a sub-region of a previously processed image frame; and

controlling, using the image processing circuitry, a size and shape of the search window in response to a determined recognition rate, wherein the controlling the size and shape of the search window comprises controlling horizontal and vertical dimensions of the search window based on the motion vector associated with the sub-region of the previously processed image frame, according to:

N

h

=

K

k

×

f

(

V

h

,

N

-

1

)

R

q

;

and

N

v

=

K

v

×

f

(

V

v

,

N

-

1

)

R

q

,

where N h is a horizontal size in pixels or sub-regions, N v is a vertical size in pixels or sub-regions, K h is a horizontal scaling constant, K v is a vertical scaling constant, f(V h, N−1 ) represents a functional dependency on a horizontal magnitude of the motion vector associated with the sub-region of the previously processed image frame, f(V v, N−1 ) represents a functional dependency on a vertical magnitude of the motion vector associated with the sub-region of the previously processed image frame, and R q represents the determined recognition rate.

11. The method of claim 10 wherein the image processing circuitry comprises a field-programmable gate array.

12. The method of claim 10 , comprising generating, using the image processing circuitry, the determined recognition rate based on feature matching.

13. The method of claim 10 , comprising:

encoding, received video data; and

computing the motion vector data.

14. The method of claim 13 wherein the encoding comprises encoding the received video data according to a standardized format.

15. The method of claim 14 wherein the standardized format comprises a MPEG or H264 format.

16. The method of claim 10 , comprising:

retrieving feature data from a buffer based upon the size of the search window; and

matching feature data for at least one feature of the image frame associated with the window against the feature data retrieved from the buffer.

17. The method of claim 16 , comprising outputting optical flow data based upon matching results of feature data.

18. A system, comprising

an image capture apparatus; and

image processing circuitry communicatively coupled to the image capture apparatus, wherein the image processing circuitry, in operation:

controls a search window location of a search window associated with an image frame based on a motion vector associated with a sub-region of a previously processed image frame; and

controls a size and shape of the search window in response to a determined recognition rate, wherein the image processing circuitry, in operation, controls horizontal and vertical dimensions of the search window according to:

N

h

=

K

k

×

f

(

V

h

,

N

-

1

)

R

q

;

and

N

v

=

K

v

×

f

(

V

v

,

N

-

1

)

R

q

,

where N h is a horizontal size in pixels or sub-regions, N v is a vertical size in pixels or sub-regions, K h is a horizontal scaling constant, K v is a vertical scaling constant, f(V h, N−1 ) represents a functional dependency on a horizontal magnitude of the motion vector associated with the sub-region of the previously processed image frame, f(V v, N−1 ) represents a functional dependency on a vertical magnitude of the motion vector associated with the sub-region of the previously processed image frame, and R q represents the determined recognition rate.

19. The system of claim 18 wherein the image processing circuitry comprises a field-programmable gate array.

20. The system of claim 18 wherein the determined recognition rate is based on feature matching.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 7, 2022
From: STMICROELECTRONICS S.R.L.
To: STMICROELECTRONICS INTERNATIONAL N.V.
Reel/Frame 060301/0355 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 1, 2013
From: PAU, DANILO PIETRO; PASTERIS, PAOLO; FALCHETTO, MIRKO
To: STMICROELECTRONICS S.R.L.
Reel/Frame 031543/0841 →
Continuity (2)
Provisional Application 61637543 · Apr 24, 2012
Related Publication 20130279762A1 · Oct 24, 2013