Systems and methods for penalty based multi-variant encoding
View Patent ↗Systems, methods, devices, circuits for data processing, and more particularly to penalty based multi-variant encoding of data.
1. A data processing system comprising:
a salting circuit operable to apply a plurality of salt data patterns to data derived from a data input;
at least one encoding circuit operable to encode the data derived from the data input to yield a plurality of candidate codewords, wherein each of the candidate codewords is at least partially different due to the plurality of salt data patterns applied by the salting circuit; and
a codeword selection circuit operable to select one of the plurality of candidate codewords as an output codeword based at least in part on robustness data for patterns in the plurality of candidate codewords.
2. The data processing system of claim 1 , wherein each of the plurality of candidate codewords is a valid encoded version of the data derived from the data input and wherein each of the plurality of candidate codewords is capable of being decoded with a same decoding algorithm to yield a duplicate of the data derived from the data input.
3. The data processing system of claim 1 , wherein the at least one encoding circuit comprises a plurality of low density parity check decoders.
4. The data processing system of claim 1 , further comprising a modulation encoder operable to apply pattern constraints to the data input, and wherein the data derived from the data input comprises modulation encoded data from the modulation encoder, wherein the salting circuit is operable to apply the plurality of salt data patterns to the modulation encoded data after the pattern constraints are applied and before the at least one encoding circuit encodes the modulation encoded data.
5. The data processing system of claim 4 , wherein the codeword selection circuit is operable to select said one of the plurality of candidate codewords by evaluating a parity bit portion of the plurality of candidate codewords generated by the at least one encoding circuit.
6. The data processing system of claim 1 , wherein the salting circuit is operable to apply the plurality of salt data patterns to the data input, wherein the data derived from the data input comprises a plurality of salted data values from the salting circuit, further comprising a plurality of modulation encoders operable to apply pattern constraints to each of the plurality of salted data values to yield a plurality of modulation encoded data values, wherein the at least one encoding circuit is operable to encode the plurality of modulation encoded data values to yield the plurality of candidate codewords.
7. The data processing system of claim 6 , wherein the codeword selection circuit is operable to select said one of the plurality of candidate codewords by evaluating an entirety of each of the plurality of candidate codewords generated by the at least one encoding circuit.
8. The data processing system of claim 1 , further comprising at least one mask expansion circuit, wherein the salting circuit is operable to apply the plurality of salt data patterns to an output of the at least one encoding circuit by mask expansion.
9. The data processing system of claim 1 , wherein the codeword selection circuit comprises a lookup table storing the robustness data for the patterns in the plurality of candidate codewords.
10. The data processing system of claim 1 , wherein the codeword selection circuit comprises a sliding window to identify each data triple in the plurality of candidate codewords and an accumulator to total a penalty value for each identified data triple.
11. The data processing system of claim 1 , wherein the robustness data comprises an error rate for a middle data symbol in each possible triple of data symbols to be processed by the data processing system.
12. The data processing system of claim 11 , wherein the robustness data is generated by passing test data through a test data processing system with similar operating characteristics to the data processing system and counting the error rate for each of the middle data symbols in each possible triple of data symbols.
13. The data processing system of claim 1 , further comprising:
a data detector circuit operable to apply a data detection algorithm to a signal derived from the output codeword to yield a detected output; and
a data decoder circuit operable to apply a data decoding algorithm to a decoder input derived from the detected output to produce a copy of the data derived from the data input and the salt data pattern applied to the generate the output codeword, wherein the data decoder circuit is further operable to discard the salt data pattern and to yield the copy of the data derived from the data input as a data output.
14. The data processing system of claim 1 , wherein the system is implemented as an integrated circuit.
15. The data processing system of claim 1 , wherein the data processing system is implemented as part of a device selected from a group consisting of: a data storage device, and a data communication device.
16. A method for data processing, comprising:
adding a plurality of salt data patterns to a data input to yield a plurality of salted data patterns;
applying a low density parity check encoding algorithm to the plurality of salted data patterns to yield a plurality of codeword candidates, wherein each of the plurality of codeword candidates is a valid encoded version of the data input and wherein each of the plurality of codeword candidates can be decoded with a same decoding algorithm;
evaluating the plurality of codeword candidates based on robustness data for possible patterns in the plurality of codeword candidates; and
selecting a codeword to output from among the plurality of codeword candidates based at least in part on the robustness data.
17. The method of claim 16 , further comprising generating the robustness data by passing test data through a data processing system and counting errors for a middle symbol in each possible symbol triplet as it is processed by the data processing system.
18. The method of claim 16 , wherein evaluating the plurality of codeword candidates comprises calculating a total penalty value based on an error rate of each middle symbol in each symbol triplet in the plurality of codeword candidates.
19. The method of claim 16 , further comprising modulation encoding the data input before applying the low density parity check encoding algorithm.
20. A storage system, comprising:
a multi-variant encoder operable to encode a data input, comprising:
a salting circuit operable to apply a plurality of salt data patterns to data derived from a data input;
at least one encoding circuit operable to encode the data derived from the data input to yield a plurality of candidate codewords, wherein each of the candidate codewords is at least partially different due to the plurality of salt data patterns applied by the salting circuit; and
a codeword selection circuit operable to select one of the plurality of candidate codewords as an output codeword based at least in part on robustness data for patterns in the plurality of candidate codewords;
a storage medium maintaining a data set comprising output codewords processed by the multi-variant encoder;
a read/write head assembly operable to write the data set to the storage medium and to read the data set from the storage medium; and
a decoder operable to decode the data set after it is read from the storage medium and to produce a copy of the data input and the salt data pattern applied to generate the output codeword, wherein the decoder is further operable to discard the salt data pattern and to yield the copy of the data input as a data output.