IP Library Granted Patent US 9,703,556
Granted Patent B2
US 9,703,556 · App. 13/876,628 · Granted Jul 11, 2017

Method for controlling an integrated circuit, integrated circuit and computer including an integrated circuit

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Quick Facts
Patent No.
US 9,703,556
App. No.
13/876,628
Granted
Jul 11, 2017
Kind
B2
Abstract

The present invention relates to a method ( 50 ) for controlling an integrated circuit ( 20 ) comprising a microprocessor, in which the integrated circuit ( 20 ) is configured to execute by default a general program, said integrated circuit being controlled by activation of a mode of operation of the integrated circuit, called “bootstrap mode”, in which said integrated circuit ( 20 ) executes a program for loading a specific program to be executed. The method ( 50 ) comprises: i) a step ( 51 ) of sending at least one bootstrap mode activation message to a test module ( 200 ) of the integrated circuit ( 20 ) via a test bus ( 310 ), ii) a step ( 52 ) of activating the bootstrap mode of the integrated circuit ( 20 ), executed by the test module ( 200 ) of the integrated circuit ( 20 ), and iii) a step ( 53 ) of loading the specific program via a communication bus ( 320 ) different from the test bus ( 310 ). The present invention also relates to an integrated circuit ( 20 ) and a computer ( 30 ) including such an integrated circuit ( 20 ).

Claims (22)

1. A method for controlling an integrated circuit comprising a microprocessor, in which the integrated circuit is configured to execute by default a general program, said integrated circuit being controlled by activation of a mode of operation of the integrated circuit, the mode of operation being a bootstrap mode, and loading of a specific program to be executed, the method comprises:

sending at least one bootstrap mode activation message, in the form of a predetermined control instruction associated with a test function, to a test module of the integrated circuit via a test bus;

activating the bootstrap mode of the integrated circuit controlled by the test function, by an activation module coupled to the test module and executed by said test module of the integrated circuit; and

loading the specific program via a communication bus different from the test bus.

2. The method as claimed in claim 1 , wherein the integrated circuit is configured to load the specific program via a plurality of communication buses, the at least one message comprising an identifier of the communication bus to be used during the loading the specific program.

3. The method as claimed in claim 2 , wherein the activation of the bootstrap mode is executed by a non-lockable function of the test module, a lockable function being a function whose execution is able to be blocked by configuration of the test module.

4. The method as claimed in claim 2 , further comprising performing authenticating prior to any exchange of data with the test module.

5. The method as claimed in claim 1 , wherein the activation of the bootstrap mode is executed by a non-lockable function of the test module, a lockable function being a function whose execution is able to be blocked by configuration of the test module.

6. The method as claimed in claim 5 , further comprising performing authenticating prior to any exchange of data with the test module.

7. The method as claimed in claim 1 , further comprising performing authenticating prior to any exchange of data with the test module.

8. The method as claimed in claim 1 , wherein the test module is a Joint Test Action Group (JTAG) module.

9. An integrated circuit, comprising:

a microprocessor configured to execute by default a general program and to load a specific program to be executed when in an operating mode that is a bootstrap mode; and

a test module to activate the bootstrap mode when the test module receives at least one message to activate said bootstrap mode, in the form of a predetermined control instruction associated with a test function; and

at least one activation module coupled to the test module over a test bus,

wherein the integrated circuit is configured to load the configuration program via a communication bus different from the test bus.

10. The integrated circuit as claimed in claim 9 , wherein the test module is a Joint Test Action Group (JTAG) module.

11. The integrated circuit as claimed in claim 10 , wherein the at least one activation module comprises a specific JTAG control instruction.

12. A computer comprising:

at least one integrated circuit conforming to claim 9 ; and

an adaptation unit between the test bus and an activation bus.

13. The computer as claimed in claim 12 , wherein the adaptation bus comprises fewer tracks than the test bus.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 24, 2023
From: CONTINENTAL AUTOMOTIVE GMBH; VITESCO TECHNOLOGIES GMBH
To: VITESCO TECHNOLOGIES GMBH
Reel/Frame 063425/0149 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 25, 2023
From: CONTINENTAL AUTOMOTIVE FRANCE S.A.S.; CONTINENTAL AUTOMOTIVE GMBH
To: VITESCO TECHNOLOGIES GMBH; CONTINENTAL AUTOMOTIVE GMBH
Reel/Frame 062492/0737 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2013
From: DANET, BERTRAND; LABORIE-FULCHIC, STEPHANE
To: CONTINENTAL AUTOMOTIVE FRANCE; CONTINENTAL AUTOMOTIVE GMBH
Reel/Frame 030501/0458 →