IP Library Granted Patent US 9,142,289
Granted Patent B2
US 9,142,289 · App. 13/883,075 · Granted Sep 22, 2015

Method for driving variable resistance element, and nonvolatile memory device

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Quick Facts
Patent No.
US 9,142,289
App. No.
13/883,075
Granted
Sep 22, 2015
Kind
B2
Abstract

A driving method for driving a variable resistance element and a nonvolatile memory device, which achieves stable storage operation. In a low resistance write process, a low resistance writing voltage pulse having the negative polarity is applied once to a variable resistance layer included in a variable resistance element while in a high resistance write process, a high resistance writing voltage pulse having the positive polarity is applied more than twice to the same variable resistance layer. Here, when a voltage value of one of the high resistance writing voltage pulses is VH 1 and a voltage value of the other high resistance writing voltage pulse applied subsequently is VH 2 , VH 1 >VH 2 is satisfied.

Claims (42)

1. A driving method for driving a variable resistance element including a first electrode, a second electrode, and a variable resistance layer interposed between the first electrode and the second electrode,

the variable resistance layer having a stacked structure including:

a first metal oxide layer comprising an oxide of a first metal; and

a second metal oxide layer comprising an oxide of a second metal and having a lower oxygen deficiency than the first metal oxide layer,

a resistance value of the variable resistance layer reversibly changing by oxygen ions migrating based on a voltage pulse applied between the first electrode and the second electrode,

the driving method comprising:

a low resistance write process in which a resistance state of the variable resistance layer is changed from a high resistance state to a low resistance state by applying a low resistance writing voltage pulse having a first polarity to the variable resistance layer; and

a high resistance write process in which the resistance state of the variable resistance layer is changed from the low resistance state to the high resistance state by applying a high resistance writing voltage pulse having a second polarity different from the first polarity to the variable resistance layer,

wherein the high resistance write process completes one change of the resistance state of the variable resistance layer to the high resistance state by applying at least a plurality of the high resistance writing voltage pulses to the variable resistance layer,

the high resistance write process includes the steps of:

(a) applying a first high resistance writing voltage pulse having a voltage value VH 1 between the first electrode and the second electrode; and

(b) applying a second high resistance writing voltage pulse having a voltage value VH 2 smaller than the voltage value VH 1 to the variable resistance layer, the second high resistance writing voltage pulse being applied to the variable resistance layer consecutively to the first high resistance writing voltage pulse.

2. The driving method according to claim 1 ,

wherein the second electrode is in contact with the second metal oxide layer, and

the second polarity is a polarity where a voltage of the second electrode is positive relative to a potential of the first electrode.

3. The driving method according to claim 1 ,

wherein the first metal is a first transition metal, and the second metal is a second transition metal.

4. A nonvolatile memory device comprising a variable resistance element and a voltage pulse application device,

the variable resistance element being nonvolatile and including:

a first electrode;

a second electrode; and

a variable resistance layer interposed between the first electrode and the second electrode, the variable resistance layer having a stacked structure including:

a first metal oxide layer comprising an oxide of a first metal; and

a second metal oxide layer comprising an oxide of a second metal and having a lower oxygen deficiency than the first metal oxide layer,

a resistance value of the variable resistance layer reversibly changing by oxygen ions migrating based on a voltage pulse applied between the first electrode and the second electrode,

the voltage pulse application device being configured to perform:

a low resistance write process in which a resistance state of the variable resistance layer is changed from a high resistance state to a low resistance state by applying a low resistance writing voltage pulse having a first polarity to the variable resistance layer; and

a high resistance write process in which the resistance state of the variable resistance layer is changed from the low resistance state to the high resistance state by applying a high resistance writing voltage pulse having a second polarity different from the first polarity to the variable resistance layer,

wherein the high resistance write process completes one change of the resistance state of the variable resistance layer to the high resistance state by applying at least a plurality of the high resistance writing voltage pulses to the variable resistance layer, and

in the high resistance write process, processing of applying at least a first high resistance writing voltage pulse having a voltage value VH 1 between the first electrode and the second electrode and, consecutively, processing of applying a second high resistance writing voltage pulse having a voltage value VH 2 smaller than the voltage value VH 1 are performed.

5. The nonvolatile memory device according to claim 4 ,

wherein a resistance value of the second metal oxide layer is greater than a resistance value of the first metal oxide layer.

6. The nonvolatile memory device according to claim 5 ,

wherein the first metal and the second metal are the same metal.

7. The nonvolatile memory device according to claim 4 ,

wherein the first metal is a first transition metal and the second metal is a second transition metal.

8. The nonvolatile memory device according to claim 4 ,

wherein the variable resistance layer includes an oxygen-deficient first tantalum oxide layer having a composition represented by TaO x (wherein 0.8≦x≦1.9) and a second tantalum oxide layer having a composition represented by TaO y (wherein 2.1≦y).

9. The nonvolatile memory device according to claim 4 ,

wherein the first metal and the second metal are different metals and a standard electrode potential of the second metal is lower than a standard electrode potential of the first metal.

10. The driving method for driving the variable resistance element according to claim 1 ,

wherein in step (b), the resistance state of the variable resistance layer is changed so as to fill, with oxygen ions, an oxygen vacancy which is caused in the variable resistance layer by applying the first high resistance writing voltage pulse to the variable resistance layer.

Assignments (4)
CORRECTIVE ASSIGNMENT TO CORRECT THE ERRONEOUSLY FILED APPLICATION NUMBERS 13/384239, 13/498734, 14/116681 AND 14/301144 PREVIOUSLY RECORDED ON REEL 034194 FRAME 0143. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Dec 24, 2020
From: PANASONIC CORPORATION
To: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
Reel/Frame 056788/0362 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 20, 2017
From: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
To: III HOLDINGS 12, LLC
Reel/Frame 042079/0796 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 10, 2014
From: PANASONIC CORPORATION
To: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
Reel/Frame 034194/0143 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 18, 2013
From: TAKAGI, TAKESHI; KATAYAMA, KOJI
To: PANASONIC CORPORATION
Reel/Frame 030820/0693 →