IP Library Granted Patent US 9,049,151
Granted Patent B2
US 9,049,151 · App. 13/886,039 · Granted Jun 2, 2015

Low-power policy for port

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Quick Facts
Patent No.
US 9,049,151
App. No.
13/886,039
Granted
Jun 2, 2015
Kind
B2
Abstract

Various example embodiments are disclosed. According to an example embodiment, a method may include determining, by a port processor, a buffer length based on an amount of data stored in a port controlled by the port processor, comparing the buffer length to a low-power buffer threshold, determining a link utilization based on a number of packets transmitted by the port, comparing the link utilization to a link utilization threshold, and placing the port into a low-power state based on the comparison of the buffer length to the low-power buffer threshold and the comparison of the link utilization to the link utilization threshold.

Claims (46)

1. An apparatus comprising:

a port processor, the port processor being configured to:

compare a buffer length to a low-power buffer threshold, the buffer length being based on an amount of data stored for a port controlled by the port processor;

place the port into a low-power state based on the comparison of the buffer length to the low-power buffer threshold; and

when the port is in the low-power state:

remove the port from the low-power state based on either of the following conditions:

comparing the buffer length to a non-zero timer expiration buffer threshold upon expiration of an aging timer and while in the low-power state; and

comparing the buffer length to an active buffer threshold before the expiration of the aging timer, the active buffer threshold being different than the timer expiration buffer threshold.

2. The apparatus of claim 1 , wherein the placing the port into the low-power state includes placing the port into the low-power state based on the buffer length being less than the low-power buffer threshold.

3. The apparatus of claim 1 , wherein the placing the port into the low-power state includes instructing the port to cease transmission of packets.

4. The apparatus of claim 1 , wherein the timer expiration buffer threshold is less than the active buffer threshold.

5. The apparatus of claim 1 , wherein the port processor is included in the port, the port being configured to receive packets from a memory management unit.

6. The apparatus of claim 1 , wherein the apparatus operates according to an IEEE 802.3az Energy Efficient Ethernet (EEE) protocol.

7. The apparatus of claim 1 , wherein the port processor is further configured to:

compare a link utilization to a link utilization threshold, the link utilization being based on a number of packets transmitted by the port,

wherein the placing the port into the low-power state includes placing the port into the low-power state based on the comparison of the buffer length to the low-power buffer threshold and the comparing the link utilization to the link utilization threshold.

8. The apparatus of claim 1 , further comprising a memory management unit, the memory management unit being configured to determine whether to forward packets to the port.

9. An apparatus comprising:

a port processor, the port processor being configured to:

compare a link utilization to a link utilization threshold, the link utilization being based on a number of packets transmitted by a port controlled by the port processor;

place the port into a low-power state based on the comparison of the link utilization to the link utilization threshold; and

when the port is in the low-power state:

remove the port from the low-power state based on either of the following conditions:

comparing a buffer length to a non-zero timer expiration buffer threshold upon expiration of an aging timer and while in the low-power state, the buffer length being based on an amount of data stored for the port controlled by the port processor; and

comparing the buffer length to an active buffer threshold before the expiration of the aging timer, the active buffer threshold being different than the timer expiration buffer threshold.

10. The apparatus of claim 9 , wherein the placing the port into the low-power state includes placing the port into the low-power state based on the link utilization being less than the link utilization threshold.

11. The apparatus of claim 9 , wherein the placing the port into the low-power state includes instructing the port to cease transmission of packets.

12. The apparatus of claim 9 , wherein the timer expiration buffer threshold is less than the active buffer threshold.

13. The apparatus of claim 9 , wherein the apparatus operates according to an IEEE 802.3az Energy Efficient Ethernet (EEE) protocol.

14. The apparatus of claim 9 , wherein the port processor is further configured to:

compare a buffer length to a low-power buffer threshold, the buffer length being based on an amount of data stored for the port,

wherein the placing the port into the low-power state includes placing the port into the low-power state based on the comparison of the buffer length to the low-power buffer threshold and the comparing the link utilization to the link utilization threshold.

15. A non-transitory computer-readable storage medium comprising instructions stored thereon that, when executed by a port processor, are configured to cause the port processor to at least:

compare a buffer length to a low-power buffer threshold, the buffer length being based on an amount of data stored for a port controlled by the port processor;

place the port into a low-power state based on the comparison of the buffer length to the low-power buffer threshold; and

when the port is in the low-power state:

remove the port from the low-power state based on either of the following conditions:

comparing the buffer length to a non-zero timer expiration buffer threshold upon expiration of an aging timer and while in the low-power state; and

comparing the buffer length to an active buffer threshold before the expiration of the aging timer, the active buffer threshold being different than the timer expiration buffer threshold.

16. The storage medium of claim 15 , wherein the placing the port into the low-power state includes placing the port into the low-power state based on the buffer length being less than the low-power buffer threshold.

17. The storage medium of claim 15 , wherein the placing the port into the low-power state includes instructing the port to cease transmission of packets.

18. The storage medium of claim 15 , wherein the timer expiration buffer threshold is less than the active buffer threshold.

19. The storage medium of claim 15 , wherein the port processor operates according to an IEEE 802.3az Energy Efficient Ethernet (EEE) protocol.

20. The storage medium of claim 15 , wherein the port processor is further configured to:

compare a link utilization to a link utilization threshold, the link utilization being based on a number of packets transmitted by the port,

wherein the placing the port into the low-power state includes placing the port into the low-power state based on the comparing the buffer length to the low-power buffer threshold and the comparing the link utilization to the link utilization threshold.

Assignments (7)
CORRECTIVE ASSIGNMENT TO CORRECT THE PATENT NUMBER 9,385,856 TO 9,385,756 PREVIOUSLY RECORDED AT REEL: 47349 FRAME: 001. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Mar 22, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 051144/0648 →
CORRECTIVE ASSIGNMENT TO CORRECT THE EFFECTIVE DATE PREVIOUSLY RECORDED ON REEL 047229 FRAME 0408. ASSIGNOR(S) HEREBY CONFIRMS THE THE EFFECTIVE DATE IS 09/05/2018. Recorded Oct 29, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047349/0001 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047229/0408 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: BROADCOM CORPORATION
Reel/Frame 041712/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 1, 2017
From: BROADCOM CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041706/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: BROADCOM CORPORATION
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037806/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 18, 2015
From: DING, JIN; KWAN, BRUCE
To: BROADCOM CORPORATION
Reel/Frame 035196/0543 →