Solid-state imaging device, method of manufacturing the same, and electronic apparatus
View Patent ↗A solid-state imaging device is provided, which includes a pixel region in which pixels including a photoelectric conversion section and a plurality of pixel transistors are arranged. In the solid-state imaging device, a transfer transistor of the pixel transistors includes: a transfer gate electrode extended in a surface of the substrate formed on the surface of a semiconductor substrate; and a transfer gate electrode buried in the substrate which is electrically insulated from the transfer gate electrode extended in a surface of the substrate and is embedded in the inside of the semiconductor substrate in the vertical direction through the transfer gate electrode extended in a surface of the substrate.
1. A solid-state imaging device comprising:
a pixel region in which pixels including a photoelectric conversion section and a plurality of pixel transistors are arranged,
wherein a transfer transistor of the pixel transistors includes:
a first transfer gate electrode formed along a surface of a well region, the well region formed on a semiconductor substrate; and
a second transfer gate electrode embedded in the well region and in a vertical direction through the first transfer gate electrode, wherein the first transfer gate electrode does not physically contact the second transfer gate electrode.
2. The solid-state imaging device according to claim 1 , wherein different potentials are independently applied to the first transfer gate electrode and the second transfer gate electrode.
3. The solid-state imaging device according to claim 2 , wherein the potentials are applied at different timings to the first transfer gate electrode and the second transfer gate electrode.
4. The solid-state imaging device according to claim 3 , wherein the first transfer gate electrode and the second transfer gate electrode are respectively formed by materials having different work functions, and
independent or common potentials are applied to the first transfer gate electrode and the second transfer gate electrode.
5. The solid-state imaging device according to claim 1 , wherein the first transfer gate electrode and the second transfer gate electrode are respectively formed by materials having different work functions, and
independent or common potentials are applied to the first transfer gate electrode and the second transfer gate electrode.
6. The solid-state imaging device according to claim 4 , wherein a thickness of a gate insulating film under the first transfer gate electrode extended and a thickness of a gate insulating film under the periphery of the second transfer gate electrode are different from each other.
7. The solid-state imaging device according to claim 6 , wherein a material of the gate insulating film under the first transfer gate electrode and a material of the second gate insulating film under the periphery of the transfer gate electrode are different from each other.
8. The solid-state imaging device according to claim 7 , wherein the gate insulating film under the periphery of the second transfer gate electrode is formed to have a material film with negative fixed charges.
9. The solid-state imaging device according to claim 7 , wherein the photoelectric conversion section is formed by a multistage photodiode having a p-n junction formed in the vicinity of the surface of the semiconductor substrate, and a p-n junction formed on the inside of the semiconductor substrate.
10. The solid-state imaging device according to claim 8 , wherein an interconnection layer is formed in the surface side in which the pixel transistor of the semiconductor substrate is formed, and
incident light is incident from the backside of the semiconductor substrate.
11. A method of manufacturing a solid-state imaging device, comprising the steps of:
forming a photoelectric conversion section and other pixel transistors in a well region in which pixels of a pixel region are formed;
forming a vertical hole which reaches the inside of the well region in the vertical direction through a first transfer gate electrode formed along a surface of the well region, wherein the well region is formed on the surface of a semiconductor substrate;
forming a gate insulating film on the inner wall surface of the vertical hole; and
forming a transfer transistor having the first transfer gate electrode formed along the surface of the well region and a second vertical gate electrode by embedding a transfer gate electrode within the vertical hole, wherein the first transfer gate electrode does not physically contact the second transfer gate electrode.
12. The method of manufacturing a solid-state imaging device according to claim 11 , further comprising the step of:
removing a portion of the gate insulating film facing the inside of the vertical hole by dry etching, after the step of forming the vertical hole.
13. The method of manufacturing a solid-state imaging device according to claim 12 , further comprising the steps of:
forming the gate insulating film of the inner wall surface of the vertical hole by an insulation film formed through thermal oxidation, or a high-dielectric insulation film formed through a low-temperature atomic layer deposition method; and
forming the second transfer gate electrode by (i) forming a conductive polysilicon film while performing impurity doping, or (ii) forming a metal film.
14. An electronic apparatus comprising:
an optical lens;
a solid-state imaging device; and
a signal processing circuit that processes an output signal of the solid-state imaging device,
wherein the solid-state imaging device includes:
a pixel region in which pixels including a photoelectric conversion section and a plurality of pixel transistors are arranged, and
a transfer transistor of the pixel transistors includes:
a first transfer gate electrode formed along a surface of a well region, the well region formed on a semiconductor substrate; and
a second transfer gate electrode embedded in the well region and in a vertical direction through the first transfer gate electrode, wherein the first transfer gate electrode does not physically contact the second transfer gate electrode.
15. The electronic apparatus according to claim 14 , wherein different potentials are independently applied to the first transfer gate electrode and the second transfer gate electrode.
16. A three-dimensional MOS transistor comprising:
a first source region, a second source region and a drain region formed in a well region of a semiconductor substrate;
a plane gate electrode formed along the well region with a gate insulating film interposed between the first source region and the drain region;
a vertical gate electrode which passes through the plane gate electrode and is embedded in the inside of the well region in the vertical direction, wherein the plane gate electrode does not physically contact the vertical gate electrode; and
a second source region extension portion extending from the second source region to the vertical gate electrode.