IP Library Granted Patent US 8,836,053
Granted Patent B2
US 8,836,053 · App. 13/890,450 · Granted Sep 16, 2014

Hybrid integrated component and method for the manufacture thereof

Inventors: Heribert Weber (Nuertingen, DE); Frank Fischer (Gomaringen, DE); Mirko Hattass (Stuttgart, DE); Yvonne Bergmann (Reutlingen, DE)
Assignee: Robert Bosch GmbH
B81B3/0021B81C1/00261
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Quick Facts
Patent No.
US 8,836,053
App. No.
13/890,450
Granted
Sep 16, 2014
Kind
B2
Abstract

A component system includes at least one MEMS element, a cap for a micromechanical structure of the MEMS element, and at least one ASIC substrate. The micromechanical structure of the MEMS element is implemented in the functional layer of an SOI wafer. The MEMS element is mounted face down, with the structured functional layer on the ASIC substrate, and the cap is implemented in the substrate of the SOI wafer. The ASIC substrate includes a starting substrate provided with a layered structure on both sides. At least one circuit level is implemented in each case both in the MEMS-side layered structure and in the rear-side layered structure of the ASIC substrate. In the ASIC substrate, at least one ASIC through contact is implemented which electrically contacts at least one circuit level of the rear-side layered structure and/or at least one circuit level of the MEMS-side layered structure.

Claims (22)

1. A component, comprising:

at least one MEMS element having a micromechanical structure;

a cap for the micromechanical structure of the MEMS element; and

at least one ASIC substrate;

wherein:

the micromechanical structure of the MEMS element is implemented in a functional layer of an SOI wafer functioning as the MEMS substrate;

the MEMS element is mounted face down, with the structured functional layer on the ASIC substrate;

the cap is implemented in the substrate of the SOI wafer;

the ASIC substrate includes a starting substrate, which is provided with a layered structure on both sides, at least one circuit level being implemented in each case both in the MEMS-side layered structure and also in the rear-side layered structure of ASIC substrate; and

in the ASIC substrate, at least one ASIC through contact is implemented which, originating from the rear side of the component, electrically contacts at least one of a circuit level of the rear-side layered structure and a circuit level of the MEMS-side layered structure.

2. The component as recited in claim 1 , wherein:

a cap-side layered structure having at least one circuit level is implemented on the MEMS element; and

in the MEMS element, at least one MEMS through contact is implemented which, originating from the upper side of the component, electrically contacts at least one circuit level of the cap-side layered structure.

3. The component as recited in claim 2 , wherein at least one of the ASIC through contact and the MEMS through contact extends up to the functional layer of the MEMS element.

4. The component as recited in claim 2 , wherein at least one of the ASIC through contact and the MEMS through contact extends beyond the functional layer of the MEMS element.

5. The component as recited in claim 2 , wherein the at least one ASIC through contact and the at least one MEMS through contact are situated aligned with one another and merge into one another to form a through contact for the entire component.

6. The component as recited in claim 2 , wherein at least one of the ASIC through contact and the MEMS through contact has a stepped shape having step surfaces which each terminate with a selected circuit level of the component to provide a planar electrical contact between (i) the at least one of the ASIC through contact and the MEMS through contact and (ii) the selected circuit level.

7. The component as recited in claim 2 , wherein:

the component is an inertial sensor component;

the micromechanical structure of the MEMS element includes at least one seismic mass and is equipped with a circuit arrangement for detecting deflections of the seismic mass;

a standoff structure is implemented in the MEMS-side layered structure of the ASIC substrate; and

at least parts of an evaluation circuit for sensor signals are integrated into at least one of the circuit level of the ASIC substrate and the circuit level of the MEMS element.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 14, 2013
From: WEBER, HERIBERT; FISCHER, FRANK; HATTASS, MIRKO; BERGMANN, YVONNE
To: ROBERT BOSCH GMBH
Reel/Frame 031008/0988 →
Priority Claims (1)
DE 10 2012 208 033 · May 14, 2012 · national
Continuity (1)
Related Publication 20130299924A1 · Nov 14, 2013