IP Library Granted Patent US 9,153,567
Granted Patent B2
US 9,153,567 · App. 13/899,916 · Granted Oct 6, 2015

Semiconductor device

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Quick Facts
Patent No.
US 9,153,567
App. No.
13/899,916
Granted
Oct 6, 2015
Kind
B2
Abstract

A semiconductor device comprises: a memory cell region having a first transistor and a peripheral circuit region having a second transistor. The first transistor has a first source electrode and a first drain electrode, a first buried gate insulating film which is formed along an inner wall of a trench and whose relative dielectric constant is higher than a relative dielectric constant of silicon oxide, and a buried gate electrode. The second transistor has a second source electrode and a second drain electrode, a first on-substrate gate insulating film whose relative dielectric constant is higher than a relative dielectric constant of silicon oxide, and an on-substrate gate electrode. A first Hf content percentage, which is a content percentage of hafnium in the first buried gate insulating film, is different from a second Hf content percentage, which is a content percentage of hafnium in the first on-substrate gate insulating film.

Claims (58)

1. A semiconductor device, comprising:

a memory cell region having a first transistor, and a peripheral circuit region which is formed around said memory cell region and has a second transistor, on a semiconductor substrate; wherein

said first transistor has:

a first source electrode and a first drain electrode which are formed on said semiconductor substrate,

a first buried gate insulating film which is formed along an inner wall of a trench formed in said semiconductor substrate between said first source electrode and said first drain electrode and whose relative dielectric constant is higher than a relative dielectric constant of silicon oxide, and

a buried gate electrode which is formed in said trench on said first buried gate insulating film, comprises metal and functions as a word line; and

said second transistor has:

a second source electrode and a second drain electrode which are formed on said semiconductor substrate,

a first on-substrate gate insulating film which is formed on a surface of said semiconductor substrate between said second source electrode and said second drain electrode and whose relative dielectric constant is higher than a relative dielectric constant of silicon oxide, and

an on-substrate gate electrode which is formed on said first on-substrate gate insulating film and comprises metal;

said first buried gate insulating film and said first on-substrate gate insulating film comprising a compound containing hafnium, wherein

a first Hf content percentage, which is a content percentage of hafnium in said first buried gate insulating film, is different from a second Hf content percentage, which is a content percentage of hafnium in said first on-substrate gate insulating film.

2. The semiconductor device according to claim 1 , wherein

said first Hf content percentage is lower than said second Hf content percentage.

3. The semiconductor device according to claim 1 , wherein

said first Hf content percentage is lower than said second Hf content percentage by 10 atm % or more.

4. The semiconductor device according to claim 1 , wherein

said hafnium-containing compound in said first buried gate insulating film is not crystallized even if said first buried gate insulating film is heat-treated at a temperature of 700 degrees Celsius or more.

5. The semiconductor device according to claim 1 , wherein

said first Hf content percentage is 10 atm % to 90 atm %.

6. The semiconductor device according to claim 1 , wherein

said first buried gate insulating film comprises hafnium silicate.

7. The semiconductor device according to claim 1 , wherein

said first buried gate insulating film has a thickness ranging from 1 nm to 3.5 nm.

8. The semiconductor device according to claim 1 , further comprising:

a second buried gate insulating film between an inner wall of said trench of said semiconductor substrate and said first buried gate insulating film.

9. The semiconductor device according to claim 8 , wherein

said second buried gate insulating film comprises a silicon oxide film or a silicon oxynitride film.

10. The semiconductor device according to claim 1 , wherein

a part of said second transistors in said peripheral circuit region further has/have a second on-substrate gate insulating film having higher relative dielectric constant than that of silicon oxide on said first on-substrate gate insulating film.

11. The semiconductor device according to claim 10 , wherein

said second on-substrate gate insulating film comprises alumina.

12. The semiconductor device according to claim 1 , wherein

said second transistor further has a third on-substrate insulating film between said semiconductor substrate and said first on-substrate insulating film.

13. The semiconductor device according to claim 12 , wherein

said third on-substrate insulating film is a silicon oxide film or a silicon oxynitride film.

14. The semiconductor device according to claim 1 , further comprising:

a cap buried insulating film which is buried in said trench of said semiconductor substrate on said buried gate electrode.

15. The semiconductor device according to claim 1 , wherein

said first on-substrate gate insulating film is formed above a most upper surface of said semiconductor substrate.

16. The semiconductor device according to claim 1 , wherein

said first on-substrate gate insulating film comprises hafnium oxide or hafnium silicate.

17. A semiconductor device, comprising:

a first transistor and a second transistor on a semiconductor substrate; wherein

said first transistor includes:

a first gate insulating film which is formed along an inner wall of a trench formed in said semiconductor substrate and whose relative dielectric constant is higher than a relative dielectric constant of silicon oxide, and

a first gate electrode which is buried in said trench and formed on said first gate insulating film, and comprises metal; and

said second transistor includes:

a second gate insulating film which is formed on a most upper surface of said semiconductor substrate and whose relative dielectric constant is higher than a relative dielectric constant of silicon oxide, and

a second gate electrode which is formed on said second gate insulating film and comprises metal;

said first gate insulating film and said second gate insulating film comprising a compound containing hafnium, wherein

a first Hf content percentage, which is a content percentage of hafnium in said first gate insulating film, is different from a second Hf content percentage, which is a content percentage of hafnium in said second gate insulating film.

18. The semiconductor device according to claim 17 , wherein

said first Hf content percentage is lower than said second Hf content percentage.

19. The semiconductor device according to claim 17 , wherein

said first Hf content percentage is lower than said second Hf content percentage by 10 atm % or more.

20. The semiconductor device according to claim 17 , wherein

said first Hf content percentage is 10 atm % to 90 atm %.

Assignments (6)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 21, 2018
From: LONGITUDE SEMICONDUCTOR S.A.R.L.
To: LONGITUDE LICENSING LIMITED
Reel/Frame 046863/0001 →
CHANGE OF NAME Recorded Aug 24, 2016
From: PS5 LUXCO S.A.R.L.
To: LONGITUDE SEMICONDUCTOR S.A.R.L.
Reel/Frame 039793/0880 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 24, 2016
From: PS4 LUXCO S.A.R.L.
To: PS5 LUXCO S.A.R.L.
Reel/Frame 039818/0506 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 15, 2014
From: ELPIDA MEMORY, INC.
To: PS4 LUXCO S.A.R.L.
Reel/Frame 032901/0196 →
SECURITY AGREEMENT Recorded Jul 29, 2013
From: PS4 LUXCO S.A.R.L.
To: ELPIDA MEMORY INC.
Reel/Frame 032414/0261 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 11, 2013
From: SAINO, KANTA
To: ELPIDA MEMORY, INC.
Reel/Frame 030584/0132 →