OFFLOADING OF COMPUTATION FOR RACK LEVEL SERVERS AND CORRESPONDING METHODS AND SYSTEMS
Methods for handling multiple networked applications using a distributed server system are disclosed. Methods can include providing at least one main processor and a plurality of offload processors connected to a memory bus; providing an arbiter connected to each of the plurality of offload processors, the arbiter capable of scheduling resource priority for instructions or data received from the memory bus; and operating a virtual switch respectively connected to the main processor and the plurality of offload processors using the memory bus, with the virtual switch capable of receiving memory read/write data over the memory bus; and directing at least some memory read/write data to the arbiter from the virtual switch.
1 . A method for handling multiple networked applications using a distributed server system, comprising:
providing at least one main processor and a plurality of offload processors connected to a memory bus;
providing an arbiter connected to each of the plurality of offload processors, the arbiter capable of scheduling resource priority for instructions or data received from the memory bus; and
operating a virtual switch respectively connected to the main processor and the plurality of offload processors using the memory bus, with the virtual switch capable of receiving memory read/write data over the memory bus; and
directing at least some memory read/write data to the arbiter from the virtual switch.
2 . The method of claim 1 , wherein the offload processors provide support for a web server and the at least one main processor provides support for at least one of server side script engine, a web page rendering engine, or a database engine.
3 . The method of claim 1 , wherein the offload processors provide support for multimedia streaming data and the at least one main processor provides support for an overlay control.
4 . The method of claim 1 , wherein the offload processors provide support for a proxy server.
5 . The method of claim 1 , wherein the offload processors are connected to memory, and further include a snoop control unit for coherent read out and write in to memory.
6 . The method of claim 1 , wherein the offload processors are connected to memory to permit zero-overhead context switching between threads of a networked application.
7 . The method of claim 1 , wherein the offload processors are connected to memory and a computational FPGA, all being mounted together on XIMM module configured for insertion into a DIMM socket.