IP Library Granted Patent US 8,923,071
Granted Patent B2
US 8,923,071 · App. 13/903,775 · Granted Dec 30, 2014

Method of programming a multi-bit per cell non-volatile memory

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Quick Facts
Patent No.
US 8,923,071
App. No.
13/903,775
Granted
Dec 30, 2014
Kind
B2
Abstract

A method of programming a multi-bit per cell non-volatile memory is disclosed. In one embodiment, the non-volatile memory is read to obtain a first data of a most-significant-bit (MSB) page on a current word line that succeeds in data reading, wherein the current word line follows a preceding word line on which data reading fails. At least one reference voltage is set. The MSB page on the current word line is secondly programmed with a second data according to the reference voltage, the second data being different from the first data.

Claims (17)

1. A method of programming a multi-bit per cell non-volatile memory, comprising the following steps performed in order:

(A) reading data on a current word line on which data reading fails;

(B) reading to obtain a first data from a page has been programmed on the at least one neighbor word line, wherein the first data is different from the data with which the neighbor word line is programmed; and

(C) programming one page of at least one neighbor word line that is neighboring to the current word line.

2. The method of claim 1 , wherein the non-volatile memory is a flash memory, a phase change memory (PCM) or an electrically erasable programmable read-only memory (EEPROM).

3. The method of claim 1 , wherein the first data is read from a less-significant-bit (LSB) page or a center-significant bit (CSB) page on the at least one neighbor word line.

4. The method of claim 3 , wherein the data with which the page of the neighbor word line is programmed is an inverse of the first data.

5. The method of claim 1 , wherein the one page of the at least one neighbor word line is programmed with random data, uniformly distributed, data or same data.

6. A method of programming a multi-bit per cell non-volatile memory, comprising the following steps performed in order:

(A) reading data on a current word line on which data reading fails;

(B) reading one page on at least one neighbor word line to obtain the first data; and

(C) secondly programming said one page with a second data on the at least one neighbor word line, the second data being different from the first data.

7. The method of claim 6 , wherein the neighbor word line follows the current word line when the current word line is not a last word line of a physical block of the nonvolatile memory; and the neighbor word line precedes the current word line when the current word line is the last word line of the physical block of the non-volatile memory.

8. The method of claim 6 , wherein the second data is an inverse of the first data.

9. The method of claim 6 , wherein the second data is random data, uniformly distributed data or same data.

10. The method of claim 6 , wherein the first data is read from a most-significant-bit (MSB) page on the at least one neighbor word line.

11. The method of claim 6 , wherein the second data is secondly programmed in a most-significant-bit (MSB) page on the at least one neighbor word line.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 22, 2019
From: AUSPITEK (SHENZHEN) INC.
To: YEESTOR MICROELECTRONICS CO., LTD
Reel/Frame 048961/0085 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 7, 2016
From: SKYMEDI CORPORATION
To: AUSPITEK (SHENZHEN) INC.
Reel/Frame 038211/0263 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 28, 2013
From: HUANG, HAN-LUNG; CHOU, MING-HUNG
To: SKYMEDI CORPORATION
Reel/Frame 030497/0268 →