IP Library Granted Patent US 9,136,163
Granted Patent B2
US 9,136,163 · App. 13/904,535 · Granted Sep 15, 2015

Manufacturing method for semiconductor device and semiconductor device

Inventor: Hideomi Kumano (Tokyo, JP)
Assignee: Canon Kabushiki Kaisha
H01L21/76807H01L21/76898H01L23/481H01L27/1464H01L27/14634H01L27/14636H01L31/02002H01L31/18H01L2224/48463H01L2924/13091
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Quick Facts
Patent No.
US 9,136,163
App. No.
13/904,535
Granted
Sep 15, 2015
Kind
B2
Abstract

A step of forming a connecting member configured to electrically connect a first conductive line and a second conductive line includes a phase of perforating a laminate from a first semiconductor wafer to form a plurality of connection holes that reach the second conductive line and a phase of filling the plurality of penetrating connection holes with a conductive material to form conductive sections in contact with the second conductive line.

Claims (41)

1. A manufacturing method for a semiconductor device, the method comprising:

preparing a laminate of a first component and a second component, the first component comprising a first semiconductor substrate and a first conductive line supported by the first semiconductor substrate, the second component comprising a second semiconductor substrate and a second conductive line supported by the second semiconductor substrate; and

forming a connecting member configured to electrically connect the first conductive line and the second conductive line of the laminate,

wherein the forming of the connecting member comprises:

a phase of perforating the laminate from a side of the first component to form a plurality of connection holes that reach the first conductive line; and

a phase of filling the plurality of connection holes with a conductive material to form conductive sections in contact with the first conductive line.

2. The manufacturing method for a semiconductor device according to claim 1 ,

wherein the forming of the connecting member further comprises:

a phase of perforating the laminate to form a connection hole that reaches the second conductive line; and

a phase of filling the connection hole that reaches the second conductive line with a conductive material to form a conductive section in contact with second conductive line,

the phase of forming the connection holes that reach the first conductive line and the phase of forming the connection hole that reaches the second conductive line are performed separately, and

the phase of filling the connection holes that reach the first conductive line with the conductive material and the phase of filling the connection hole that reaches the second conductive line with the conductive material are performed in parallel.

3. A manufacturing method for a semiconductor device, the method comprising:

preparing a laminate of a first component and a second component, the first component comprising a first semiconductor substrate and a first conductive line supported by the first semiconductor substrate, the second component comprising a second semiconductor substrate and a second conductive line supported by the second semiconductor substrate; and

forming a connecting member configured to electrically connect the first conductive line and the second conductive line of the laminate,

wherein the forming of the connecting member comprises:

a phase of perforating the laminate from a side of the first component to form a plurality of connection holes that reach the second conductive line; and

a phase of filling the plurality of connection holes with a conductive material to form conductive sections in contact with the second conductive line.

4. The manufacturing method for a semiconductor device according to claim 3 , wherein the forming of the connecting member further comprises:

a phase of perforating the laminate from the side of the first component to form a plurality of connection holes that reach the first conductive line; and

a phase of filling the plurality of connection holes with a conductive material to form conductive sections in contact with the first conductive line.

5. The manufacturing method for a semiconductor device according to claim 3 , wherein the connection holes have different diameters from one another.

6. The manufacturing method for a semiconductor device according to claim 3 , wherein the connection holes that reach the second conductive line are formed such that the first conductive line is exposed.

7. The manufacturing method for a semiconductor device according to claim 3 , wherein the second conductive line is formed into a plurality of separate metal patterns within a metal layer at an identical level, and each of the connection holes is formed for each of the metal patterns.

8. The manufacturing method for a semiconductor device according to claim 3 , wherein the forming of the connecting member is performed with a dual damascene process.

9. The manufacturing method for a semiconductor device according to claim 3 , further comprising dividing the laminate into a plurality of chips after the forming of the connecting member.

10. The manufacturing method for a semiconductor device according to claim 3 , further comprising forming at least one of a color filter and a micro lens at a side of the first semiconductor substrate opposite to the second semiconductor substrate after the forming of the connecting member, the first semiconductor substrate comprising a photoelectric conversion element.

11. The manufacturing method for a semiconductor device according to claim 3 ,

wherein the forming of the connecting member further comprises:

a phase of perforating the laminate to form a connection hole that reaches the first conductive line; and

a phase of filling the connection hole that reaches the first conductive line with a conductive material to form a conductive section in contact with first conductive line,

the phase of forming the connection holes that reach the second conductive line and the phase of forming the connection hole that reaches the first conductive line are performed separately, and

the phase of filling the connection holes that reach the second conductive line with the conductive material and the phase of filling the connection hole that reaches the first conductive line with the conductive material are performed in parallel.

12. The manufacturing method for a semiconductor device according to claim 3 , wherein the first component further comprises a plurality of metal layers each formed of copper as a primary material, and the connecting member is in contact with one of the metal layers of the first component, the one of the metal layers being closest to the first semiconductor substrate.

13. The manufacturing method for a semiconductor device according to claim 3 , wherein the forming of the connecting member further comprises:

a phase of perforating the laminate to form a connection hole that reaches the first conductive line; and

a phase of filling the connection hole that reaches the first conductive line with a conductive material to form a conductive section in contact with the first conductive line.

14. The manufacturing method for a semiconductor device according to claim 13 , wherein the phase of filling the connection hole that reaches the first conductive line with the conductive material and the phase of filling the connection holes that reach the second conductive line with the conductive material are performed in parallel.

15. The manufacturing method for a semiconductor device according to claim 13 , wherein the phase of forming the connection hole that reaches the first conductive line and the phase of forming the connection holes that reach the second conductive line are performed separately.

16. The manufacturing method for a semiconductor device according to claim 13 , wherein the connection holes that reach the second conductive line and the connection hole that reaches the first conductive line differ in at least one of a diameter and the number of holes.

17. The manufacturing method for a semiconductor device according to claim 13 , wherein the forming of the connecting member further comprises a phase of forming a coupling conductive section into a plurality of separate metal patterns within a metal layer at an identical level, the coupling conductive section being configured to couple the conductive sections in contact with the second conductive line and the conductive section in contact with the first conductive line.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 30, 2013
From: KUMANO, HIDEOMI
To: CANON KABUSHIKI KAISHA
Reel/Frame 031124/0187 →
Priority Claims (1)
JP 2012-124838 · May 31, 2012 · national
Continuity (1)
Related Publication 20130321680A1 · Dec 5, 2013