IP Library Granted Patent US 9,944,520
Granted Patent B2
US 9,944,520 · App. 13/912,876 · Granted Apr 17, 2018

Syndrome of degraded quantum redundancy coded states

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Quick Facts
Patent No.
US 9,944,520
App. No.
13/912,876
Granted
Apr 17, 2018
Kind
B2
Abstract

An apparatus includes a device having n input ports and n output ports. The n input ports are configured to receive n corresponding physical objects of a physically processed, quantum redundancy coded state. The n output ports are configured to output the n physical objects in the physically processed, quantum redundancy coded state. The device is configured to measure bits of a syndrome of the physically processed, quantum redundancy coded state by passing the n physical objects through the device. The device is configured to measure a parity check bit for the measured bits of the syndrome by the passing the n physical objects through the device.

Claims (10)

1. An apparatus, comprising:

an input register connected to receive and store a physical state of n qubits;

a plurality of auxiliary registers, each auxiliary register of the plurality being configured to transmit a preset state of one or more qubits;

a quantum circuit being constructed to transform the preset states based on the physical state received from the input register and to output the physical state to an output register; and

a plurality of detectors, each detector of the plurality being connected to receive a corresponding one of the transformed preset states from the quantum circuit and being configured to produce a value by measuring one or more qubits of the corresponding received one of the transformed preset states; and

wherein the quantum circuit is configured to form the transformed preset states such that the produced values measure bits of a syndrome of the physical state and such that at least one of the produced values measures a parity check bit for the measured bits of the syndrome.

2. The apparatus of claim 1 , further comprising a controller being configured to receive the values from the detectors and being configured to error-correct one of the produced values that measures a bit of the syndrome based on the value that measures a parity check bit.

3. The apparatus of claim 2 , further comprising an error-correction module being configured to receive the physical state from the output register and to error-correct the received physical state based on an error-corrected value of the syndrome produced by the electronic controller.

4. The apparatus of claim 1 , wherein the quantum circuit is configured to serially produce the transformed preset states.

5. The apparatus of claim 1 , wherein the quantum circuit is configured to transform, at least, two of the preset states in parallel.

Assignments (3)
RELEASE OF SECURITY INTEREST Recorded Aug 28, 2014
From: CREDIT SUISSE AG
To: ALCATEL-LUCENT USA
Reel/Frame 033647/0251 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 15, 2014
From: ALCATEL-LUCENT USA INC.
To: ALCATEL LUCENT
Reel/Frame 033543/0089 →
SECURITY AGREEMENT Recorded Jul 22, 2013
From: ALCATEL LUCENT USA, INC.
To: CREDIT SUISSE AG
Reel/Frame 030851/0364 →