Program execution device and compiler system
View Patent ↗A program execution device includes a program loader reading a machine language program including a machine language code and access frequency information; an address conversion table creator creating an address conversion table including entries, each of which indicates a relation between a logical address range and a physical address range; and a TLB register registering, in a TLB, an entry of the address conversion table storing a logical address range accessed according to the machine language code. When determining that the frequency of access to a logical address range is high based on the access frequency information, the address conversion table creator adjusts the size of an entry storing this logical address range to an appropriate size.
1. A program execution device configured to execute a machine language program, the program execution device comprising:
a program loader configured to read the machine language program, the machine language program including a machine language code and access frequency information associated with a logical address range accessed according to the machine language code and the frequency of access to the logical address range;
an address conversion table creator configured to create an address conversion table including entries, each of which indicates a relation between a logical address range and a physical address range; and
a translation look-aside buffer (TLB) register configured to register, in a TLB, an entry of the address conversion table storing a logical address range accessed according to the machine language code, wherein
when determining that the frequency of access to a logical address range is high based on the access frequency information, the address conversion table creator adjusts the size of an entry storing this logical address range to an appropriate size.
2. The program execution device of claim 1 , wherein the address conversion table creator adjusts the size of an entry of the address conversion table storing a logical address range having a high access frequency to a minimum size where this logical address range can be stored.
3. The program execution device of claim 1 , wherein the address conversion table creator selects, as a default size, a size of an entry of the address conversion table storing a logical address range having a low access frequency.
4. The program execution device of claim 1 , wherein
the address conversion table creator selects, as a lock candidate, an entry of the address conversion table storing a logical address range to which the frequency of access is higher than or equal to a threshold value, and
the TLB register registers, in a lock field of the TLB, the entry of the address conversion table selected as a lock candidate.
5. The program execution device of claim 1 , wherein the address conversion table creator creates the address conversion table such that the entries of the address conversion table are sorted in order of the access frequency.