IP Library Granted Patent US 9,496,292
Granted Patent B2
US 9,496,292 · App. 13/915,671 · Granted Nov 15, 2016

Display device and manufacturing method for same

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Quick Facts
Patent No.
US 9,496,292
App. No.
13/915,671
Granted
Nov 15, 2016
Kind
B2
Abstract

The present invention provides a display device having: gate electrodes formed on a transparent substrate; a gate insulating film for covering the gate electrodes; an oxide semiconductor formed on the gate insulating film; drain electrodes and source electrodes formed at a distance from each other with channel regions of the oxide semiconductor in between; an interlayer capacitor film for covering the drain electrodes and source electrodes; common electrodes formed on top of the interlayer capacitor film; and pixel electrodes formed so as to face the common electrodes, and wherein an etching stopper layer for covering the channel regions is formed between the oxide semiconductor and the drain electrodes and source electrodes, the drain electrodes are a multilayer film where a transparent conductive film and a metal film are layered on top of each other, and the drain electrodes and source electrodes make direct contact with the oxide semiconductor.

Claims (17)

1. A liquid crystal display device, comprising: gate electrodes formed on a transparent substrate; a gate insulating film for covering said gate electrodes; an oxide semiconductor formed on said gate insulating film; drain electrodes and source electrodes formed at a distance from each other with channel regions in said oxide semiconductor in between; an interlayer capacitor film formed of an insulating film for covering said drain electrodes and source electrodes; common electrodes formed on top of said interlayer capacitor film; and pixel electrodes formed so as to face said common electrodes and connected to said source electrodes, wherein

a side of said pixel electrodes opposing said common electrodes is in contact only with said interlayer capacitor film,

an etching stopper layer for covering said channel regions is formed between said oxide semiconductor and said drain electrodes and source electrodes,

said drain electrodes are comprised of a multilayer film including a transparent conductive film and a metal film layered on top of each other,

said drain electrodes and source electrodes make direct contact with said oxide semiconductor,

the entirety of said oxide semiconductor overlaps said gate electrode as viewed from the top, and said source electrodes and said pixel electrodes are integrally formed of the same transparent conductive film, and

said etching stopper layer is tapered in the vertical direction in a cross-section at an angle of 10 degrees or greater and 75 degrees or less to prevent disconnection of the etching stopper layer at points of contact between the etching stopper layer and the source and drain electrodes.

2. The liquid crystal display device according to claim 1 , wherein

said source electrodes are comprised of a multilayer film including a transparent conductive film and a metal film layered on top of each other,

said pixel electrodes are formed of said metal film for forming said source electrodes, and

said source electrodes and said pixel electrodes are continuously formed.

3. The liquid crystal display device according to claim 1 , wherein

the thickness of said transparent conductive film for forming said source electrodes and drain electrodes is 10 nm or greater and 100 nm or less.

4. The liquid crystal display device according to claim 1 , wherein the height of said etching stopping layer is 50 nm or greater and 500 nm or less.

5. The liquid crystal display device according to claim 1 , wherein said oxide semiconductor includes at least one of ZnO, InGaZnO, ZnInO and ZnSnO.

6. The liquid crystal display device according to claim 1 , wherein said transparent conductive film is formed of either indium tin oxide or indium zinc oxide.

7. The liquid crystal display device according to claim 1 , wherein said metal film includes one of Mo, Cr, W, Al, Cu, Ti, Ni, Ta and Ag.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 22, 2025
From: JAPAN DISPLAY INC.
To: MAGNOLIA WHITE CORPORATION
Reel/Frame 072130/0313 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 12, 2013
From: MIYAKE, HIDEKAZU; UEMURA, NORIHIRO; NODA, TAKESHI; SUZUMURA, ISAO; KANEKO, TOSHIKI
To: JAPAN DISPLAY INC.
Reel/Frame 030592/0765 →