IP Library Granted Patent US 9,142,311
Granted Patent B2
US 9,142,311 · App. 13/917,141 · Granted Sep 22, 2015

Screening for reference cells in a memory

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Quick Facts
Patent No.
US 9,142,311
App. No.
13/917,141
Granted
Sep 22, 2015
Kind
B2
Abstract

Selecting an array from among a plurality of arrays in a memory as a reference array. An exemplary method includes evaluating memory cells within the reference array to select a first reference cell associated with a first operation of the memory, and repeating the evaluating and the selecting to select a second reference cell from within the reference array, the second reference cell being associated with a second operation of the memory.

Claims (72)

1. A method, comprising:

selecting an array from among a plurality of arrays in a memory as a reference array;

evaluating memory cells within the reference array to select a first reference cell associated with a first operation of the memory, the evaluating comprising:

selecting a memory cell as the first reference cell when a threshold voltage associated with the memory cell is within a target voltage range;

obtaining a plurality of measured RTN values from the memory cells within the reference array;

calculating a delta RTN value by taking a difference between two measured RTN values of the memory cells within the reference array; and

determining whether the delta RTN value is less than a predetermined target RTN value of the first reference cell.

2. The method of claim 1 , wherein the evaluating further comprises:

determining the target voltage range based on an operating parameter of the memory cell;

measuring the threshold voltage associated with the memory cell; and

determining whether the measured threshold voltage is within the predetermined target voltage range.

3. A method, comprising:

selecting an array from among a plurality of arrays in a memory as a reference array;

evaluating memory cells within the reference array to select a first reference cell associated with a first operation of the memory, the evaluating comprising:

selecting a memory cell as the first reference cell when a threshold voltage associated with the memory cell is within a target voltage range;

obtaining a plurality of measurements of the RTN value from the memory cells within the reference array;

calculating a delta RTN value by taking a difference between a maximum RTN value and a minimum RTN value; and

determining whether the delta RTN value is less than a predetermined target RTN value; and

determining whether to repeat the evaluating to select a second reference cell from within the reference array, the second reference cell being associated with a second operation of the memory.

4. The method of claim 2 , wherein the evaluating further comprises:

calibrating the measured threshold voltage to be closer to a desired threshold voltage.

5. A system, comprising:

a memory; and

a processor configured to:

select an array from among a plurality of arrays in the memory as a reference array;

evaluate memory cells within the reference array to select a first reference cell associated with a first operation of the memory, wherein, to evaluate the memory cells, the processor is further configured to:

select a memory cell as the first reference cell when a threshold voltage associated with the memory cell is within a target voltage range;

receive a plurality of RTN values from the memory cells within the reference array;

calculate a delta RTN value by taking a difference between two measured RTN values of the memory cells within the reference array;

determine whether the delta RTN value is less than a predetermined target RTN value.

6. The system of claim 5 , wherein, to evaluate the memory cells, the processor is further configured to:

receive a measurement of the threshold voltage associated with the memory; and

determine whether the measured threshold voltage is within the predetermined target voltage range.

7. A system, comprising:

a memory; and

a processor configured to:

select an array from among a plurality of arrays in the memory as a reference array;

evaluate memory cells within the reference array to select a first reference cell associated with a first operation of the memory, wherein to evaluate the memory cells, the processor is further configured to:

select a memory cell as the first reference cell when a threshold voltage associated with the memory cell is within a target voltage range;

receive a plurality of RTN values from the memory cells within the reference array; and

calculate a delta RTN value by taking a difference between a maximum RTN value and a minimum RTN value, and

determine whether the delta RTN value is less than a predetermined target RTN value; and

determine whether to repeat the evaluation to select a second reference cell from within the reference array, the second reference cell being associated with a second operation of the memory.

8. The system of claim 6 , wherein, to evaluate the memory cells, the processor is further configured to:

calibrate the measured threshold voltage to be closer to a desired threshold voltage.

9. A tangible computer-readable device having instructions stored thereon that, when executed by at least one computing device, cause the at least one computing device to perform operations comprising:

selecting an array from among a plurality of arrays in a memory as a reference array;

evaluating memory cells within the reference array to select a first reference cell associated with a first operation of the memory, the evaluating comprising:

selecting a memory cell as the first reference cell when a threshold voltage associated with the memory cell is within a target voltage range,

receiving a plurality of measured RTN values from the memory cells within the reference array,

calculating a delta RTN value by taking a difference between two measured RTN values of the memory cells within the reference array, and

determining whether the delta RTN value is less than a predetermined target RTN value of the first reference cell.

10. The tangible computer-readable device of claim 9 , the operations further comprising:

predetermining the target voltage range based on an operating parameter of the memory cell;

measuring the threshold voltage associated with the memory; and

determining whether the measured threshold voltage is within the predetermined target voltage range.

11. A tangible computer-readable device having instructions stored thereon that, when executed by at least one computing device, cause the at least one computing device to perform operations comprising:

selecting an array from among a plurality of arrays in a memory as a reference array;

evaluating memory cells within the reference array to select a first reference cell associated with a first operation of the memory, the evaluating comprising:

selecting a memory cell as the first reference cell when a threshold voltage associated with the memory cell is within a target voltage range,

obtaining a plurality of measurements of the RTN value from the memory cells within the reference array,

calculating a delta RTN value by taking a difference between a maximum RTN value and a minimum RTN value, and

determining whether the delta RTN value is less than a predetermined target RTN value; and

determining whether to repeat the evaluating to select a second reference cell from within the reference array, the second reference cell being associated with a second operation of the memory.

12. The tangible computer-readable device of claim 10 , wherein the evaluating comprises:

calibrating the measured threshold voltage to be closer to a desired threshold voltage.

13. The method of claim 1 , further comprising:

determining whether repeat the evaluating to select a second reference cell from within the reference array, the second reference cell being associated with a second operation of the memory.

14. The system of claim 5 , wherein, to evaluate the memory cells, the processor is configured to:

determine whether to repeat the evaluation to select a second reference cell from within the reference array, the second reference cell being associated with a second operation of the memory.

15. The tangible computer-readable device of claim 10 , the operations further comprising:

determining whether to repeat the evaluating to select a second reference cell from within the reference array, the second reference cell being associated with a second operation of the memory.

Assignments (7)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 15, 2022
From: CYPRESS SEMICONDUCTOR CORPORATION
To: INFINEON TECHNOLOGIES LLC
Reel/Frame 059721/0467 →
RELEASE OF SECURITY INTEREST Recorded Mar 16, 2022
From: MUFG UNION BANK, N.A.
To: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
Reel/Frame 059410/0438 →
CORRECTIVE ASSIGNMENT TO CORRECT THE 8647899 PREVIOUSLY RECORDED ON REEL 035240 FRAME 0429. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTERST. Recorded Nov 3, 2020
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 058002/0470 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN INTELLECTUAL PROPERTY Recorded Oct 28, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: MUFG UNION BANK, N.A.
Reel/Frame 050896/0366 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 10, 2015
From: SPANSION LLC
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 035884/0410 →
SECURITY INTEREST Recorded Mar 21, 2015
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 035240/0429 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 13, 2013
From: LIU, ZHIZHENG; SUN, CINDY; YI, HE; KATHAWALA, GULZAR
To: SPANSION LLC
Reel/Frame 030608/0060 →