SEMICONDUCTOR STRUCTURE
A semiconductor structure includes a silicon substrate, an aluminum nitride layer and a plurality of grading stress buffer layers. The aluminum nitride layer is disposed on the silicon substrate. The grading stress buffer layers are disposed on the aluminum nitride layer. Each grading stress buffer layer includes a grading layer and a transition layer stacked up sequentially. A chemical formula of the grading layer is Al 1−x Ga x N, wherein the x value is increased from one side near the silicon substrate to a side away from the silicon substrate, and 0≦x≦1. A chemical formula of the transition layer is the same as the chemical formula of a side surface of the grading layer away from the silicon substrate. The chemical formula of the transition layer of the grading stress buffer layer furthest from the silicon substrate is GaN.
1 . A semiconductor structure, comprising:
a silicon substrate;
an aluminum nitride layer disposed on the silicon substrate; and
a plurality of grading stress buffer layers disposed on the aluminum nitride layer, wherein each of the grading stress buffer layers includes a grading layer and a transition layer stacked up sequentially, a chemical formula of each of the grading layers is Al 1−x Ga x N, wherein an x value is increased from a side near the silicon substrate to a side away from the silicon substrate, and 0≦x≦1, wherein a chemical formula of each of the transition layers is the same as a chemical formula of a side surface furthest away from the silicon substrate of each of the corresponding grading layers, and a chemical formula of the transition layer of the grading stress buffer layer furthest away from the silicon substrate is GaN.
2 . The semiconductor structure as claimed in claim 1 , wherein a thickness of each of the grading layers of the grading stress buffer layers increase from a side close to the silicon substrate to a side away from the silicon substrate.
3 . The semiconductor structure as claimed in claim 2 , wherein the thickness of each of the grading layers is between 50 nm and 700 nm.
4 . The semiconductor structure as claimed in claim 1 , wherein a thickness of each of the transition layers of the grading stress buffer layers increase from a side close to the silicon substrate to a side away from the silicon substrate.
5 . The semiconductor structure as claimed in claim 4 , wherein the thickness of each of the transition layers is between 50 nm and 700 nm.
6 . The semiconductor structure as claimed in claim 1 , wherein the x value of the chemical formula of the transition layers increases as an arithmetic progression.
7 . The semiconductor structure as claimed in claim 1 , wherein a number of the grading stress buffer layers is 2 to 10 grading stress buffer layers.
8 . The semiconductor structure as claimed in claim 1 , further comprising a superlattice structure layer, disposed between the aluminum nitride layer and the plurality of grading stress buffer layers, wherein the superlattice structure layer includes a plurality of aluminum gallium indium nitride structure layers, each of the aluminum gallium indium nitride structure layers includes a first aluminum gallium indium nitride layer and a second aluminum gallium indium nitride layer stacked on each other, a chemical formula of the first aluminum gallium indium nitride layers is Al s Ga t In (1-s-t) N, wherein 0<s<1, 0<t<1, and 0<s+t≦1, and a chemical formula of the second aluminum gallium indium nitride layers is Al m Ga n In (1-m-n) N, wherein 0<m<1, 0<n<1, and 0<m+n≦1, and when m=s, n≠t, and when n=t, m≠s.
9 . The semiconductor structure as claimed in claim 8 , wherein a thickness of each of the aluminum gallium indium nitride structure layers is between 5 nm and 500 nm.
10 . The semiconductor structure as claimed in claim 9 , wherein the thickness of the superlattice structure layer is between 20 nm and 5000 nm.
11 . The semiconductor structure as claimed in claim 8 , wherein the superlattice structure layer includes 5 or more aluminum gallium indium nitride structure layers.
12 . The semiconductor structure as claimed in claim 1 , further comprising a superlattice structure layer, disposed between the plurality of grading stress buffer layers, wherein the superlattice structure layer includes a plurality of aluminum gallium indium nitride structure layers, each of the aluminum gallium indium nitride structure layers includes a first aluminum gallium indium nitride layer and a second aluminum gallium indium nitride layer stacked on each other, a chemical formula of the first aluminum gallium indium nitride layers is Al s Ga t In (1-s-t) N, wherein 0<s<1, 0<t<1, and 0<s+t≦1, and a chemical formula of the second aluminum gallium indium nitride layers is Al m Ga n In (1-m-n) N, wherein 0<m<1, 0<n<1, and 0<m+n≦1, and when m=s, n≠t, and when n=t, m≠s.
13 . The semiconductor structure as claimed in claim 12 , wherein a thickness of each of the aluminum gallium indium nitride structure layers is between 5 nm and 500 nm.
14 . The semiconductor structure as claimed in claim 13 , wherein the thickness of the superlattice structure layer is between 20 nm and 5000 nm.
15 . The semiconductor structure as claimed in claim 12 , wherein the superlattice structure layer includes 5 or more aluminum gallium indium nitride structure layers.