IP Library Granted Patent US 8,722,346
Granted Patent B2
US 8,722,346 · App. 13/919,877 · Granted May 13, 2014

Chemiluminescence compact imaging scanner

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Quick Facts
Patent No.
US 8,722,346
App. No.
13/919,877
Granted
May 13, 2014
Kind
B2
Abstract

Systems, devices, and methods for accurately imaging chemiluminescence and other luminescence are disclosed. A compact, flat-bed scanner having a light-tight enclosure, one or more detector bars of linear charge-coupled device (CCD) or complementary metal oxide semiconductor (CMOS) imaging chips, and high working numerical aperture (NA) optics scans closely over a sample in one direction and then the opposite direction. Averages or other combinations of intensity readings for each pixel location (x, y) between the two or more passes are averaged together in order to compensate for luminescence that varies over time. On-chip pixel binning and multiple clock frequencies can be used to maximize the signal to noise ratio in a CCD-based scanner.

Claims (32)

1. A luminescence scanner apparatus for scanning a luminescent sample, the apparatus comprising:

a sample bed;

a detector bar configured to move with respect to the sample bed, the detector bar having one or more image sensor arrays, each image sensor array having a plurality of pixel elements; and

a memory device and a processor operatively coupled with the detector bar, the memory device having instructions for programming the processor to perform operations for:

moving the detector bar with respect to the sample bed in a first pass;

taking a first set of pixel readings over predetermined exposure times during the first pass, each pixel reading of the first set occurring at a respective x, y position;

moving the detector bar with respect to the sample bed in a second pass, the second pass being in an opposite direction from the first pass;

collecting a second set of pixel readings over predetermined exposure times during the second pass, each pixel reading of the second set occurring at a respective x, y; and

summing, using the processor, respective x, y position pixel readings between the first and second sets of pixel readings to construct an image.

2. The apparatus of claim 1 further comprising:

a luminescent sample on the sample bed, the luminescent sample having luminescence that changes over time, the summing respective position pixel readings between the first and second sets of pixel readings compensating for the changing luminescence of the luminescent sample.

3. The apparatus of claim 1 wherein the memory device has further instructions for:

averaging, using the summing, respective position pixel readings between the first and second sets of pixel readings to construct the image.

4. The apparatus of claim 1 wherein the predetermined exposure times of the first and second sets of pixel readings are 0.5 seconds.

5. The apparatus of claim 1 wherein the sample bed comprises a removable well plate.

6. The apparatus of claim 1 further comprising:

a gradient index (GRIN) lens array disposed between the sample bed and the one or more image sensor arrays, the GRIN lens array having a working numerical aperture (NA) of greater-than-or-equal-to 0.10,

wherein the GRIN lens array is configured to move with the detector bar.

7. The apparatus of claim 1 wherein the one or more image sensor arrays comprise a charge-coupled device (CCD) image sensor array.

8. The apparatus of claim 7 wherein the CCD image sensor array is integrated within an integrated circuit (IC), the apparatus further comprising:

a circuit adapted to sum multiple photo-charges from adjacent CCD photodiodes into a readout capacitor of the CCD image sensor array,

thereby increasing a signal to noise ratio of the CCD image sensor array.

9. The apparatus of claim 1 wherein the detector bar comprises a plurality of linear image sensor array integrated circuits (ICs) staggered with respect to each other along the detector bar.

10. The apparatus of claim 1 further comprising:

a second detector bar comprising one or more image sensor arrays, the second detector bar configured to move with respect to the sample bed,

wherein the detector bars are configured to scan over different, non-overlapping areas of the sample bed; and

the memory device has instructions for programming the processor to perform a further operation for:

constructing the image from pixel readings from the detector bars.

11. The apparatus of claim 1 wherein the detector bar is configured to be moved and the sample bed is configured to be physically stationary.

12. The apparatus of claim 1 wherein the detector bar is configured to be physically stationary and the sample bed is configured to be moved.

13. The apparatus of claim 1 wherein the memory and processor comprise a dedicated hardware or firmware circuit.

14. The apparatus of claim 1 wherein the memory and processor comprise a general purpose processor.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 2, 2023
From: LI-COR, INC.
To: LI-COR BIOTECH, LLC
Reel/Frame 065436/0001 →
SECURITY INTEREST Recorded Oct 30, 2023
From: LI-COR BIOTECH, LLC
To: MIDCAP FINANCIAL TRUST
Reel/Frame 065396/0454 →
SECURITY INTEREST Recorded Dec 1, 2021
From: LI-COR, INC.
To: MIDCAP FINANCIAL TRUST
Reel/Frame 058293/0889 →