IP Library Granted Patent US 9,465,737
Granted Patent B1
US 9,465,737 · App. 13/921,562 · Granted Oct 11, 2016

Memory systems including a duplicate removing filter module that is separate from a cache module

Inventors: Sandeep Karmarkar (Pune, IN); Paresh Phadke (Pune, IN)
Assignee: Toshiba Corporation
G06F12/0802G06F3/0608G06F3/0641G06F3/0656G06F3/0683G06F12/023
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Quick Facts
Patent No.
US 9,465,737
App. No.
13/921,562
Granted
Oct 11, 2016
Kind
B1
Abstract

A memory system includes a cache module configured to store data. A duplicate removing filter module is separate from the cache module. The duplicate removing filter module is configured to receive read requests and write requests for data blocks to be read from or written to the cache module, selectively generate fingerprints for the data blocks associated with the write requests, selectively store at least one of the fingerprints as stored fingerprints and compare a fingerprint of a write request to the stored fingerprints.

Claims (48)

1. A memory system comprising:

a cache memory configured to store data;

a backend data store;

a duplicate removing filter separate from the cache memory and configured to:

receive read requests and write requests for data blocks to be read from or written to the cache memory;

generate fingerprints for the data blocks associated with the write requests and store at least one of the fingerprints in the duplicate removing filter;

determine a match between a fingerprint of a data block of a write request and the at least one stored fingerprints;

send a logical block address of the write request and a cache reference corresponding to the matched fingerprint to the cache memory in response to a single condition indicating that the fingerprint of the data block matches the at least one stored fingerprints;

in response to receiving a write request as a write-back operation, send the logical block address of the write request, the fingerprint of the write request and the data block to the cache memory; and

in response to identifying a write request as a write-thru operation, the duplicate removing filter is configured to send the data block to the backend data store without performing duplicate removal.

2. The memory system of claim 1 , wherein the cache memory is implemented as an integrated circuit.

3. The memory system of claim 1 , wherein the cache memory comprises a solid state drive.

4. The memory system of claim 1 , wherein the duplicate removing filter is configured to send one of the data blocks associated with the write request, the logical block address of the write request and the fingerprint of the write request to the cache memory when the fingerprint of the write request does not match any of the stored fingerprints.

5. The memory system of claim 4 , wherein the cache memory is configured to send a cache reference to the duplicate removing filter in response to the duplicate removing filter sending the data block, the logical block address and the fingerprint to the cache memory.

6. The memory system of claim 4 , wherein the cache memory is configured to maintain metadata including the fingerprint and the logical block address of the one of the data blocks associated with the write request.

7. The memory system of claim 1 , wherein the duplicate removing filter increments a counter associated with the one of the stored fingerprints when the fingerprint of the write request matches one of the stored fingerprints.

8. The memory system of claim 1 , wherein the duplicate removing filter is configured to read one of the data blocks associated with a read request from the cache memory when a read hit occurs.

9. The memory system of claim 1 , wherein the duplicate removing filter is configured to:

read one of the data blocks associated with a read request from a backend data store when a read miss occurs;

send the one of the data blocks associated with the read request from the backend data store to an application of a host device;

generate a fingerprint for the one of the data blocks associated with the read request; and

send the one of the data blocks associated with the read request, a logical block address associated with the read request and the fingerprint for the one of the data blocks associated with the read request to the cache memory.

10. The memory system of claim 9 , wherein the cache memory is configured to send a cache reference to the duplicate removing filter in response to the duplicate removing filter sending the one of the data blocks associated with the react request, the logical block address associated with the read request and the fingerprint for the one of the data blocks associated with the read request to the cache memory.

11. The memory system of claim 1 , wherein the fingerprints uniquely identify the data blocks and when the cache memory evicts one of the data blocks, the cache memory identifies whether the one of the data blocks is a duplicate or unique and sends a cache reference and the fingerprint corresponding to the one of the data blocks to the duplicate removing filter.

12. The memory system of claim 11 , wherein when the one of the data blocks to be evicted is a duplicate, the cache memory instructs the duplicate removing filter to reduce a counter associated with the one of the data blocks.

13. The memory system of claim 11 , wherein when the one of the data blocks to be evicted is unique the cache memory is configured to:

instruct the duplicate removing filter to reduce a counter associated with the one of the data blocks; and

remove the one of the data blocks from the cache memory.

14. The memory system of claim 1 , wherein, in response to identifying the write request as the write-thru operation, the duplicate removing filter is further configured to send the logical block address of the write request, the fingerprint of the write request and the data block to the cache memory without performing duplicate removal.

15. The memory system of claim 1 , further comprising: an input connection configured to receive the write request as either the write-back or write-thru operation from an application on a host device.

16. A method for operating a memory system comprising:

separating a duplicate removing filter from a cache;

and in the duplicate removing filter:

receiving read requests and write requests for data blocks to be read from or written to the cache memory;

generating fingerprints for the data blocks associated with the write requests and storing at least one of the fingerprints in the duplicate removing filter; and

determine a match between a fingerprint of a write request and the at least one of the stored fingerprints;

send a logical block address of the write request and a cache reference corresponding to the matched fingerprint to the cache in response to a single condition indicating that the fingerprint of the data block matches the at least one stored fingerprints;

in response to receiving a write request as a write back operation, send the logical block address of the write request, the fingerprint of the write request and the data block to the cache memory; and

in response to identifying the at least one request is for a write-thru operation, the duplicate removing filter sends the first data block to a backend data store without performing duplicate removal.

17. The method of claim 16 , further comprising sending one of the data blocks associated with the write request, the logical block address of the write request and the fingerprint of the write request to the cache when the fingerprint of the write request does not match any of the stored fingerprints.

18. The method of claim 17 , further comprising sending a cache reference to the duplicate removing filter in response to the duplicate removing filter sending the data block, the logical block address and the fingerprint to the cache.

19. The method of claim 17 , further comprising maintaining metadata including the fingerprint and the logical block address of the one of the data blocks associated with the write request.

20. The method of claim 16 , further comprising:

reading one of the data blocks associated with a read request from a backend data store when a read miss occurs;

sending the one of the data blocks associated with the read request from the backend data store to an application of a host device;

generating a fingerprint for the one of the data blocks associated with the read request; and

sending the one of the data blocks associated with the read request, a logical block associated with the read request address and the fingerprint for the one of the data blocks associated with the read request to the cache.

21. The method of claim 16 , further comprising: receiving the write request as either the write-back or write-through operation from an application on a host device.

Assignments (7)
MERGER Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: K.K. PANGEA
Reel/Frame 055659/0471 →
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: K.K. PANGEA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 055669/0401 →
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: KIOXIA CORPORATION
Reel/Frame 055669/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 22, 2018
From: TOSHIBA CORPORATION
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 047262/0500 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 12, 2014
From: MARVELL INTERNATIONAL LTD.
To: TOSHIBA CORPORATION
Reel/Frame 032208/0241 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 17, 2013
From: MARVELL INDIA PVT. LTD.
To: MARVELL INTERNATIONAL LTD.
Reel/Frame 031425/0074 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 17, 2013
From: KARMARKAR, SANDEEP; PHADKE, PARESH
To: MARVELL INDIA PVT. LTD.
Reel/Frame 031424/0984 →
Continuity (1)
Provisional Application 61667051 · Jul 2, 2012