Data processor and control system
View Patent ↗Provided are a data processor, and a control system, in which an interrupt controller and an event link controller are adopted. The event link controller responds to a generated event signal to output a start control signal for controlling start of an operation of a circuit module. The circuit module is able to generate an event signal. The event link controller generates the start control signal according to the correspondences between event signals and start control signals which are defined by event control information. The links between the event signals and start control signals can be prescribed by the event control information. Therefore, operations of circuit modules prescribed by such links can be controlled sequentially. The control neither involves save and return processes by CPU as in the interrupt processing, nor needs priority level control as executed on competing interrupt requests.
1. A data processor comprising:
a central processing unit configured to execute instructions;
a plurality of circuit modules operatively coupled to the central processing unit and each configured to output one of a plurality of event signals;
a first controller configured to output an interrupt request to the central processing unit based on a selected one of the event signals; and
a second controller configured to output a start control signal to a first circuit module of said plurality of circuit modules based on the event signal generated from a second circuit module of the plurality of circuit modules, said second controller including
a multiplexer;
an operation select circuit;
a connection set register; and
an operation set register,
wherein the multiplexer includes inputs to receive the event signals, and an output to output one of the event signals selected from among the received event signals based on a value of the connection set register,
wherein the operation select circuit outputs to the start control signal as one of a first and a second start control output signal to the first circuit module which causes the first circuit module to perform a given operation when the operation select circuit receives the selected event signal,
wherein the first circuit module is configured to perform a plurality of functions, and
wherein the second control signal is used for selecting one of the plurality of functions, and the first start control signal is used for a start signal of the selected function.
2. The data processor of claim 1 ,
wherein the second controller has an event enable register, and
wherein the event enable register is used to store information for data disabling of outputs of the multiplexers depending on a value of said stored information.
3. The data processor of claim 2 ,
wherein the first controller has an interrupt enable flag, and
wherein the interrupt enable flag is used to store information for a request which disables outputs of the first controller depending on a value of said stored information.
4. The data processor of claim 1 ,
wherein settings of the connection set register and the operation set register are set by the central processing unit.