IP Library Granted Patent US 9,318,602
Granted Patent B2
US 9,318,602 · App. 13/926,307 · Granted Apr 19, 2016

Semiconductor device and method for manufacturing semiconductor device

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Quick Facts
Patent No.
US 9,318,602
App. No.
13/926,307
Granted
Apr 19, 2016
Kind
B2
Abstract

A semiconductor device according to one embodiment includes a semiconductor substrate, a back-gate layer formed above the semiconductor substrate, and a stacked body formed above the back-gate layer and comprising a plurality of insulating layers alternately formed between a plurality of electrode layers. The lowermost electrode layer of the plurality of electrode layers contains metal, and remaining electrode layers of the plurality of electrode layers other than the lowermost electrode layer do not contain the metal. Furthermore, the semiconductor device includes a pair of columnar semiconductor layers penetrating the stacked body and a semiconductor layer connecting lower portions of the pair of columnar semiconductor layers, the semiconductor layer embedded in the surface of the back-gate layer.

Claims (57)

1. A semiconductor device, comprising:

a semiconductor substrate;

a back-gate layer formed above the semiconductor substrate;

a stacked body formed above the back-gate layer, the stacked body including a plurality of insulating layers alternately formed between a plurality of electrode layers, wherein a lowermost electrode layer of the plurality of electrode layers contains a metal and remaining electrode layers of the plurality of electrode layers other than the lowermost electrode layer do not contain the metal of the lowermost electrode layer;

a pair of columnar semiconductor layers penetrating the stacked body; and

a semiconductor layer connecting lower portions of the pair of columnar semiconductor layers, the semiconductor layer embedded in a surface of the back-gate layer.

2. The semiconductor device according to claim 1 , wherein

the plurality of insulating layers comprise a material having an etch rate that is greater than an etch rate of the lowermost electrode layer.

3. The semiconductor device according to claim 2 , wherein

the remaining electrode layers comprise a material having an etch rate that is greater than the etch rate of the lowermost electrode layer.

4. The semiconductor device according to claim 3 , wherein

the plurality of insulating layers comprise silicon oxide,

the lowermost electrode layer comprises tungsten or tungsten silicide, and

the remaining electrode layers comprise silicon.

5. The semiconductor device according to claim 1 , wherein

each of the remaining electrode layers comprises a thickness that is greater than a thickness of the lowermost electrode layer.

6. The semiconductor device according to claim 5 , wherein

the remaining electrode layers have almost a same thickness.

7. A semiconductor device, comprising:

a semiconductor substrate;

a back-gate layer formed above the semiconductor substrate;

a stacked body formed above the back-gate layer and comprising a plurality of insulating layers alternately formed between a plurality of electrode layers, the stacked body having a lowermost electrode layer of the plurality of electrode layers that contains a metal and remaining electrode layers of the plurality of electrode layers other than the lowermost electrode layer;

a pair of columnar semiconductor layers penetrating the stacked body; and

a semiconductor layer connecting lower portions of the pair of columnar semiconductor layers, the semiconductor layer embedded in a surface of the back-gate layer, wherein

the material of the plurality of insulating layers contains silicon oxide,

the material of the lowermost electrode layer contains tungsten or tungsten silicide, and

the material of the remaining electrode layers contains silicon.

8. The semiconductor device according to claim 7 , wherein

the plurality of insulating layers comprise a material having an etch rate that is greater than an etch rate of the lowermost electrode layer.

9. The semiconductor device according to claim 8 , wherein

the remaining electrode layers comprise a material having an etch rate that is greater than the etch rate of the lowermost electrode layer.

10. The semiconductor device according to claim 7 , wherein

each of the remaining electrode layers comprises a thickness that is greater than a thickness of the lowermost electrode layer.

11. The semiconductor device according to claim 10 , wherein

the remaining electrode layers have almost a same thickness.

12. A semiconductor device, comprising:

a semiconductor substrate;

a back-gate layer formed on the semiconductor substrate;

a stacked body comprising a plurality of insulating layers alternately formed between a plurality of electrode layers formed on the back-gate layer, wherein a lowermost electrode layer of the plurality of electrode layers comprises a metal and remaining electrode layers of the plurality of electrode layers other than the lowermost electrode layer do not contain the metal of the lowermost electrode layer;

a pair of columnar semiconductor layers penetrating the stacked body; and

a semiconductor layer connecting lower portions of the pair of columnar semiconductor layers, the semiconductor layer embedded in a surface of the back-gate layer.

13. The semiconductor device according to claim 12 , wherein

the plurality of insulating layers comprise a material having an etch rate that is greater than an etch rate of the lowermost electrode layer.

14. The semiconductor device according to claim 13 , wherein

the remaining electrode layers comprise a material having an etch rate that is greater than the etch rate of the lowermost electrode layer.

15. The semiconductor device according to claim 12 , wherein

the plurality of insulating layers comprise silicon oxide,

the lowermost electrode layer comprises tungsten or tungsten silicide, and

the remaining electrode layers comprise silicon.

16. The semiconductor device according to claim 12 , wherein

each of the remaining electrode layers comprises a thickness that is greater than a thickness of the lowermost electrode layer.

17. The semiconductor device according to claim 16 , wherein

the thickness of the remaining electrode layers are substantially the same.

18. The semiconductor device according to claim 12 , further comprising:

an insulator penetrating the stacked body.

19. The semiconductor device according to claim 18 , wherein

the insulator separates the lowermost electrode layer.

Assignments (5)
MERGER Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: K.K. PANGEA
Reel/Frame 055659/0471 →
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: KIOXIA CORPORATION
Reel/Frame 055669/0001 →
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: K.K. PANGEA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 055669/0401 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 14, 2017
From: KABUSHIKI KAISHA TOSHIBA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 043194/0647 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 25, 2013
From: TANIGUCHI, SHUICHI
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 030681/0807 →