IP Library Granted Patent US 8,754,711
Granted Patent B2
US 8,754,711 · App. 13/926,851 · Granted Jun 17, 2014

Method and system for a feedback transimpedance amplifier with sub-40khz low-frequency cutoff

Inventor: Brian Welch (San Diego, CA)
Assignee: Luxtera, Inc.
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Quick Facts
Patent No.
US 8,754,711
App. No.
13/926,851
Granted
Jun 17, 2014
Kind
B2
Abstract

A system for a feedback transimpedance amplifier with sub-40 khz low-frequency cutoff is disclosed and may include amplifying electrical signals received via coupling capacitors utilizing a transimpedance amplifier (TIA) having feedback paths comprising source followers and feedback resistors. Gate terminals of the source followers may be coupled to output terminals of the TIA. The feedback paths may be coupled prior to the coupling capacitors at inputs of the TIA. Voltages may be level shifted prior to the coupling capacitors to ensure stable bias conditions for the TIA. The TIA may be integrated in a CMOS photonics chip and the source followers may comprise CMOS transistors. The TIA may receive current-mode logic or voltage signals. The electrical signals may be received from a photodetector, which may comprise a silicon germanium photodiode differentially coupled to the TIA. Optical signals for the photodetector in the CMOS photonics chip may be received via optical fibers.

Claims (25)

1. A system for processing electrical signals, the system comprising:

a transimpedance amplifier circuit having coupling capacitors, a transimpedance amplifier, and feedback paths comprising source followers and feedback resistors, said feedback paths being coupled prior to said coupling capacitors at inputs of said transimpedance amplifier, said transimpedance amplifier amplifying electrical signals received via said coupling capacitors, and gate terminals of said source followers being coupled to output terminals of said transimpedance amplifier.

2. The system according to claim 1 , wherein said source followers are operable to level shift voltages prior to said coupling capacitors to ensure stable bias conditions for said transimpedance amplifier circuit.

3. The system according to claim 1 , wherein said transimpedance amplifier circuit is integrated in a complementary metal-oxide semiconductor (CMOS) chip.

4. The system according to claim 3 , wherein said CMOS chip comprises a CMOS photonics chip.

5. The system according to claim 4 , wherein said CMOS photonics chip receives optical signals for said photodetector via one or more optical fibers.

6. The system according to claim 1 , wherein said source followers comprise CMOS transistors.

7. The system according to claim 1 , wherein said transimpedance amplifier receives current-mode logic signals.

8. The system according to claim 1 , wherein said transimpedance amplifier receives voltage signals.

9. The system according to claim 1 , wherein said electrical signals are received from a photodetector.

10. The system according to claim 9 , wherein said photodetector comprises a silicon germanium photodiode.

11. The system according to claim 9 , wherein said photodetector is differentially coupled to said transimpedance amplifier.

12. A method for processing optical signals, the method comprising:

in a transimpedance amplifier circuit having coupling capacitors, a transimpedance amplifier, and feedback paths comprising source followers and feedback resistors, said feedback paths being coupled prior to said coupling capacitors at inputs of said transimpedance amplifier, and gate terminals of said source followers being coupled to output terminals of said transimpedance amplifier,

amplifying electrical signals received via said coupling capacitors utilizing said transimpedance amplifier.

13. The method according to claim 12 , comprising level shifting voltages prior to said coupling capacitors to ensure stable bias conditions for said transimpedance amplifier circuit.

14. The method according to claim 12 , wherein said transimpedance amplifier circuit is integrated in a complementary metal-oxide semiconductor (CMOS) chip.

15. The method according to claim 12 , comprising receiving said electrical signals from a photodetector.

16. The method according to claim 15 , comprising receiving optical signals for said photodetector in said CMOS photonics chip via one or more optical fibers.

17. The method according to claim 12 , wherein said source followers comprise CMOS transistors.

18. The method according to claim 12 , wherein said transimpedance amplifier receives current-mode logic signals.

19. The method according to claim 12 , wherein said transimpedance amplifier received voltage signals.

20. The method according to claim 15 , wherein said CMOS chip comprises a CMOS photonics chip.

21. The method according to claim 15 , wherein said photodetector comprises a silicon germanium photodiode.

22. The method according to claim 15 , wherein said photodetector is differentially coupled to said transimpedance amplifier.

Assignments (6)
CORRECTIVE ASSIGNMENT TO CORRECT THE THE ASSIGNOR'S NAME PREVIOUSLY RECORDED AT REEL: 058979 FRAME: 0027. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Mar 24, 2022
From: LUXTERA LLC
To: CISCO TECHNOLOGY, INC.
Reel/Frame 059496/0803 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 8, 2022
From: CISCO SYSTEMS, INC.
To: CISCO TECHNOLOGY, INC.
Reel/Frame 058979/0027 →
RELEASE OF SECURITY INTEREST Recorded Dec 24, 2020
From: SILICON VALLEY BANK
To: LUXTERA, LLC
Reel/Frame 054855/0838 →
CHANGE OF NAME Recorded Feb 6, 2020
From: LUXTERA, INC.
To: LUXTERA LLC
Reel/Frame 052019/0811 →
SECURITY INTEREST Recorded Mar 29, 2017
From: LUXTERA, INC.
To: SILICON VALLEY BANK
Reel/Frame 042109/0140 →
SECURITY INTEREST Recorded Mar 20, 2015
From: LUXTERA, INC.
To: SILICON VALLEY BANK
Reel/Frame 035219/0546 →
Continuity (3)
Continuation 13175545 · Jul 1, 2011
Provisional Application 61398987 · Jul 6, 2010
Related Publication 20130284903A1 · Oct 31, 2013