IP Library Granted Patent US 9,057,919
Granted Patent B2
US 9,057,919 · App. 13/927,122 · Granted Jun 16, 2015

LCD panel capable of compensating the feed-through voltage

Inventors: Chun-Chi Lai (Hsin-Chu, TW); Ching-Wei Chen (Hsin-Chu, TW); Tsan-Chun Wang (Hsin-Chu, TW); Kuo-Hsing Cheng (Hsin-Chu, TW); Yu-Cheng Chen (Hsin-Chu, TW)
Assignee: AU Optronics Corp.
G02F1/136213G02F1/136286G02F2001/134345H01L27/1251G09G3/3648G09G2300/0426G09G2300/0439G09G2310/0205G09G2310/0213G09G2320/0214
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Quick Facts
Patent No.
US 9,057,919
App. No.
13/927,122
Granted
Jun 16, 2015
Kind
B2
Abstract

An LCD panel transmits the display data to sub-pixels in a zigzag pattern through a data line. The variation of the feed-through voltages of the sub-pixels may be modified by adjusting the ratios of the channel widths and the channel lengths of the TFTs in the sub-pixels to some predetermined ratios, or by adjusting the compensation capacitance to the coupling capacitance of the TFTs of the sub-pixels.

Claims (234)

1. An LCD panel capable of compensating a feed-through voltage, comprising:

a first sub-pixel, comprising:

a first storage capacitor; and

a first TFT including:

a first end electrically coupling to a first data line;

a second end electrically coupling to the first storage capacitor; and

a control end electrically coupling to a first scan line;

wherein a coupling capacitance and a first compensation capacitance exist between the second end and the control end of the first TFT;

a second sub-pixel, comprising:

a second storage capacitor; and

a second TFT including:

a first end electrically coupling to the second end of the first TFT;

a second end electrically coupling to the second storage capacitor; and

a control end electrically coupling to a second scan line;

wherein the coupling capacitance and a second compensation capacitance exist between the second end and the control end of the second TFT; and

a third sub-pixel, comprising:

a third storage capacitor; and

a third TFT including:

a first end electrically coupling to the second end of the second TFT;

a second end electrically coupling to the third storage capacitor; and

a control end electrically coupling to a third scan line;

wherein the coupling capacitance exists between the second end and the control end of the third TFT.

2. The LCD panel of claim 1 , wherein the first compensation capacitance is greater than the second compensation capacitance.

3. The LCD panel of claim 2 , wherein a ratio of the second compensation capacitance and the first compensation capacitance is about 1:4 to 1:7.

4. The LCD panel of claim 3 , wherein a line width of the second end of the first TFT is greater than a line width of the second end of the third TFT in order to generate the first compensation capacitance.

5. The LCD panel of claim 4 , wherein a line width of the second end of the second TFT is greater than a line width of the second end of the third TFT in order to generate the second compensation capacitance.

6. The LCD panel of claim 5 , further comprising:

a fourth sub-pixel, comprising:

a fourth storage capacitor; and

a fourth TFT, including:

a first end electrically coupling to a second data line;

a second end electrically coupling to the fourth storage capacitor; and

a control end electrically coupling to the first scan line;

wherein the coupling capacitance and the first compensation capacitance exist between the second end and control end of the fourth TFT;

a fifth sub-pixel, comprising:

a fifth storage capacitor; and

a fifth TFT, including:

a first end electrically coupling to the second end of the fourth TFT;

a second end electrically coupling to the fifth storage capacitor; and

a control end electrically coupling to the second scan line;

wherein the coupling capacitance and the second compensation capacitance exist between the second end and the control end of the fifth TFT; and

a sixth sub-pixel, comprising:

a sixth storage capacitor; and

a sixth TFT, including:

a first end electrically coupling to the second end of the fifth TFT;

a second end electrically coupling to the sixth storage capacitor; and

a control end electrically coupling to the third scan line;

wherein the coupling capacitance exists between the second end and the control end of the sixth TFT.

7. The LCD panel of claim 6 , further comprising:

a seventh sub-pixel, comprising:

a seventh storage capacitor; and

a seventh TFT, including:

a first end electrically coupling to the first data line;

a second end electrically coupling to the seventh storage capacitor; and

a control end electrically coupling to the second scan line;

wherein the coupling capacitance and the first compensation capacitance exist between the second end and the control end of the seventh TFT;

an eighth sub-pixel, including:

an eighth storage capacitor; and

an eighth TFT, including:

a first end electrically coupling to the second end of the seventh TFT;

a second end electrically coupling to the eighth storage capacitor; and

a control end electrically coupling to the third scan line;

wherein the coupling capacitance and the second compensation capacitance exist between the second end and the control end of the eighth TFT; and

a ninth sub-pixel, including:

a ninth storage capacitor; and

a ninth TFT, including:

a first end electrically coupling to the second end of the eighth TFT;

a second end electrically coupling to the ninth storage capacitor; and

a control end electrically coupling to a fourth scan line;

wherein the coupling capacitance exists between the second end and the control end of the ninth TFT.

8. The LCD panel of claim 1 , wherein a ratio of the second compensation capacitance and the first compensation capacitance is about 1:4 to 1:7.

9. The LCD panel of claim 1 , wherein a line width of the second end of the first TFT is greater than a line width of the second end of the third TFT in order to generate the first compensation capacitance.

10. The LCD panel of claim 9 , wherein a line width of the second end of the second TFT is greater than a line width of the second end of the third TFT in order to generate the second compensation capacitance.

11. The LCD panel of claim 10 , further comprising:

a fourth sub-pixel, comprising:

a fourth storage capacitor; and

a fourth TFT, including:

a first end electrically coupling to a second data line;

a second end electrically coupling to the fourth storage capacitor; and

a control end electrically coupling to the first scan line;

wherein the coupling capacitance and the first compensation capacitance exist between the second end and control end of the fourth TFT;

a fifth sub-pixel, comprising:

a fifth storage capacitor; and

a fifth TFT, including:

a first end electrically coupling to the second end of the fourth TFT;

a second end electrically coupling to the fifth storage capacitor; and

a control end electrically coupling to the second scan line;

wherein the coupling capacitance and the second compensation capacitance exist between the second end and the control end of the fifth TFT; and

a sixth sub-pixel, comprising:

a sixth storage capacitor; and

a sixth TFT, including:

a first end electrically coupling to the second end of the fifth TFT;

a second end electrically coupling to the sixth storage capacitor; and

a control end electrically coupling to the third scan line;

wherein the coupling capacitance exists between the second end and the control end of the sixth TFT.

12. The LCD panel of claim 11 , further comprising:

a seventh sub-pixel, comprising:

a seventh storage capacitor; and

a seventh TFT, including:

a first end electrically coupling to the first data line;

a second end electrically coupling to the seventh storage capacitor; and

a control end electrically coupling to the second scan line;

wherein the coupling capacitance and the first compensation capacitance exist between the second end and the control end of the seventh TFT;

an eighth sub-pixel, including:

an eighth storage capacitor; and

an eighth TFT, including:

a first end electrically coupling to the second end of the seventh TFT;

a second end electrically coupling to the eighth storage capacitor; and

a control end electrically coupling to the third scan line;

wherein the coupling capacitance and the second compensation capacitance exist between the second end and the control end of the eighth TFT; and

a ninth sub-pixel, including:

a ninth storage capacitor; and

a ninth TFT, including:

a first end electrically coupling to the second end of the eighth TFT;

a second end electrically coupling to the ninth storage capacitor; and

a control end electrically coupling to a fourth scan line;

wherein the coupling capacitance exists between the second end and the control end of the ninth TFT.

13. The LCD panel of claim 1 , wherein a line width of the second end of the second TFT is greater than a line width of the second end of the third TFT in order to generate the second compensation capacitance.

14. The LCD panel of claim 13 , further comprising:

a fourth sub-pixel, comprising:

a fourth storage capacitor; and

a fourth TFT, including:

a first end electrically coupling to a second data line;

a second end electrically coupling to the fourth storage capacitor; and

a control end electrically coupling to the first scan line;

wherein the coupling capacitance and the first compensation capacitance exist between the second end and control end of the fourth TFT;

a fifth sub-pixel, comprising:

a fifth storage capacitor; and

a fifth TFT, including:

a first end electrically coupling to the second end of the fourth TFT;

a second end electrically coupling to the fifth storage capacitor; and

a control end electrically coupling to the second scan line;

wherein the coupling capacitance and the second compensation capacitance exist between the second end and the control end of the fifth TFT; and

a sixth sub-pixel, comprising:

a sixth storage capacitor; and

a sixth TFT, including:

a first end electrically coupling to the second end of the fifth TFT;

a second end electrically coupling to the sixth storage capacitor; and

a control end electrically coupling to the third scan line;

wherein the coupling capacitance exists between the second end and the control end of the sixth TFT.

15. The LCD panel of claim 14 , further comprising:

a seventh sub-pixel, comprising:

a seventh storage capacitor; and

a seventh TFT, including:

a first end electrically coupling to the first data line;

a second end electrically coupling to the seventh storage capacitor; and

a control end electrically coupling to the second scan line;

wherein the coupling capacitance and the first compensation capacitance exist between the second end and the control end of the seventh TFT;

an eighth sub-pixel, including:

an eighth storage capacitor; and

an eighth TFT, including:

a first end electrically coupling to the second end of the seventh TFT;

a second end electrically coupling to the eighth storage capacitor; and

a control end electrically coupling to the third scan line;

wherein the coupling capacitance and the second compensation capacitance exist between the second end and the control end of the eighth TFT; and

a ninth sub-pixel, including:

a ninth storage capacitor; and

a ninth TFT, including:

a first end electrically coupling to the second end of the eighth TFT;

a second end electrically coupling to the ninth storage capacitor; and

a control end electrically coupling to a fourth scan line;

wherein the coupling capacitance exists between the second end and the control end of the ninth TFT.

16. The LCD panel of claim 1 , further comprising:

a fourth sub-pixel, comprising:

a fourth storage capacitor; and

a fourth TFT, including:

a first end electrically coupling to a second data line;

a second end electrically coupling to the fourth storage capacitor; and

a control end electrically coupling to the first scan line;

wherein the coupling capacitance and the first compensation capacitance exist between the second end and control end of the fourth TFT;

a fifth sub-pixel, comprising:

a fifth storage capacitor; and

a fifth TFT, including:

a first end electrically coupling to the second end of the fourth TFT;

a second end electrically coupling to the fifth storage capacitor; and

a control end electrically coupling to the second scan line;

wherein the coupling capacitance and the second compensation capacitance exist between the second end and the control end of the fifth TFT; and

a sixth sub-pixel, comprising:

a sixth storage capacitor; and

a sixth TFT, including:

a first end electrically coupling to the second end of the fifth TFT;

a second end electrically coupling to the sixth storage capacitor; and

a control end electrically coupling to the third scan line;

wherein the coupling capacitance exists between the second end and the control end of the sixth TFT.

17. The LCD panel of claim 16 , further comprising:

a seventh sub-pixel, comprising:

a seventh storage capacitor; and

a seventh TFT, including:

a first end electrically coupling to the first data line;

a second end electrically coupling to the seventh storage capacitor; and

a control end electrically coupling to the second scan line;

wherein the coupling capacitance and the first compensation capacitance exist between the second end and the control end of the seventh TFT;

an eighth sub-pixel, including:

an eighth storage capacitor; and

an eighth TFT, including:

a first end electrically coupling to the second end of the seventh TFT;

a second end electrically coupling to the eighth storage capacitor; and

a control end electrically coupling to the third scan line;

wherein the coupling capacitance and the second compensation capacitance exist between the second end and the control end of the eighth TFT; and

a ninth sub-pixel, including:

a ninth storage capacitor; and

a ninth TFT, including:

a first end electrically coupling to the second end of the eighth TFT;

a second end electrically coupling to the ninth storage capacitor; and

a control end electrically coupling to a fourth scan line;

wherein the coupling capacitance exists between the second end and the control end of the ninth TFT.

18. The LCD panel of claim 1 , further comprising:

a seventh sub-pixel, comprising:

a seventh storage capacitor; and

a seventh TFT, including:

a first end electrically coupling to the first data line;

a second end electrically coupling to the seventh storage capacitor; and

a control end electrically coupling to the second scan line;

wherein the coupling capacitance and the first compensation capacitance exist between the second end and the control end of the seventh TFT;

an eighth sub-pixel, including:

an eighth storage capacitor; and

an eighth TFT, including:

a first end electrically coupling to the second end of the seventh TFT;

a second end electrically coupling to the eighth storage capacitor; and

a control end electrically coupling to the third scan line;

wherein the coupling capacitance and the second compensation capacitance exist between the second end and the control end of the eighth TFT; and

a ninth sub-pixel, including:

a ninth storage capacitor; and

a ninth TFT, including:

a first end electrically coupling to the second end of the eighth TFT;

a second end electrically coupling to the ninth storage capacitor; and

a control end electrically coupling to a fourth scan line;

wherein the coupling capacitance exists between the second end and the control end of the ninth TFT.

19. A liquid crystal display (LCD) panel capable of compensating a feed-through voltage, comprising:

a substrate; and

a plurality of pixels arranged on the substrate, a first pixel among the plurality of pixels including a first transistor having a first end, a second end and a control end, a second pixel among the plurality of pixels including a second transistor having a first end, a second end and a control end, wherein:

a coupling capacitance and a first compensation capacitance exist between the second end of the first transistor and the control end of the first transistor;

the coupling capacitance and a second compensation capacitance exist between the second end of the second transistor and the control end of the second transistor; and

the first compensation capacitance is different from the second compensation capacitance so that a driving ability of the first transistor is different from a driving ability of the second transistor.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 21, 2023
From: AUO CORPORATION
To: OPTRONIC SCIENCES LLC
Reel/Frame 064658/0572 →
CHANGE OF NAME Recorded May 25, 2023
From: AU OPTRONICS CORPORATION
To: AUO CORPORATION
Reel/Frame 063785/0830 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 26, 2013
From: LAI, CHUN-CHI; CHEN, CHING-WEI; WANG, TSAN-CHUN; CHENG, KUO-HSING; CHEN, YU-CHENG
To: AU OPTRONICS CORP.
Reel/Frame 030685/0363 →
Priority Claims (1)
TW 99147028 A · Dec 30, 2010 · national
Continuity (2)
Division 13118446 · May 29, 2011
Related Publication 20130286310A1 · Oct 31, 2013