IP Library Granted Patent US 8,730,725
Granted Patent B2
US 8,730,725 · App. 13/927,968 · Granted May 20, 2014

Method of programming/reading a non-volatile memory with a sequence

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,730,725
App. No.
13/927,968
Granted
May 20, 2014
Kind
B2
Abstract

A method of programming/reading a multi-bit per cell non-volatile memory with a sequence is disclosed. A plurality of less-significant-bit pages are programmed, and a plurality of consecutive most-significant-bit pages of a plurality of consecutive word lines are programmed one after the other in a consecutive order. The most-significant-bit pages through all word lines in at least one memory block of the non-volatile memory are programmed or read after the less-significant-bit pages through all the word lines in the at least one memory block are programmed or read.

Claims (24)

1. A method of programming a multi-bit per cell non-volatile memory with a sequence, comprising:

programming a plurality of less-significant-bit pages; and

programming a plurality of consecutive most-significant-bit pages of a plurality of consecutive word lines one after the other in a consecutive order;

wherein the most-significant-bit pages through all word lines in a memory block of the non-volatile memory are programmed after the less-significant-bit pages through all the word lines in the memory block are programmed.

2. The method of claim 1 , wherein the multi-bit per cell non-volatile memory is a two-bit cell flash memory, a three-bit per cell flash memory or a four-bit cell flash memory.

3. The method of claim 1 , wherein the step of programming the less-significant-bit pages comprises:

programming low-bit pages through all word lines in a memory block of the non-volatile memory; and

programming the less-significant-bit pages other than the low-bit pages through all the word lines in the memory block of the non-volatile memory.

4. The method of claim 3 , wherein the step of programming the consecutive most-significant-bit pages comprises:

programming high-bit pages through all the word lines in the memory block of the non-volatile memory.

5. A method of programming a multi-bit per cell non-volatile memory with a sequence, comprising:

programming a plurality of less-significant-bit pages in a memory block; and

programming a plurality of most-significant-bit pages of a plurality of consecutive word lines one after the other in a consecutive order in the memory block;

wherein the programmed less-significant-bit pages constitute less than the whole of the memory block before programming the most-significant-bit pages of the plurality of consecutive word lines.

6. The method of claim 5 , wherein the multi-bit per cell non-volatile memory is a two-bit per cell flash memory, a three-bit per cell flash memory or a four-bit per cell flash memory.

7. A method of reading a multi-bit per cell non-volatile memory with a sequence, comprising:

reading a plurality of less-significant-bit pages through a plurality of consecutive word lines in a memory block of the multi-bit per cell non-volatile memory; and

reading a plurality of most-significant-bit pages through the plurality of consecutive word lines in the memory block of the multi-bit per cell non-volatile memory.

8. The method of claim 7 , wherein the step of reading the less-significant-bit pages comprises:

reading low-bit pages through all word lines in a memory block of the non-volatile memory; and

reading the less-significant-bit pages other than the low-bit pages through all the word lines in the memory block of the non-volatile memory.

9. The method of claim 7 , wherein the step of reading the consecutive most-significant-bit pages comprises:

reading high-bit pages through all the word lines in the a memory block of the non-volatile memory.

10. The method of claim 7 , wherein the multi-bit per cell non-volatile memory is a two-bit per cell flash memory, a three-bit per cell flash memory or a four-bit per cell flash memory.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 22, 2019
From: AUSPITEK (SHENZHEN) INC.
To: YEESTOR MICROELECTRONICS CO., LTD
Reel/Frame 048961/0085 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 7, 2016
From: SKYMEDI CORPORATION
To: AUSPITEK (SHENZHEN) INC.
Reel/Frame 038211/0263 →