Trench MOSFET

1. A method of forming a trench MOSFET, the method comprising:

forming a drain region in a semiconductor substrate;

forming a body region in the semiconductor substrate above the drain region, forming the body region including:

implanting dopant atoms in the body region of the semiconductor substrate with a first implantation energy;

implanting dopant atoms in the body region of the semiconductor substrate with a second implantation energy; and

implanting dopant atoms in the body region of the semiconductor substrate with a third implantation energy; and

implanting dopant atoms in the body region of the semiconductor substrate with a fourth implantation energy;

implanting dopant atoms in a source region of the semiconductor substrate above the body region; and

forming a trench in the semiconductor substrate, a sidewall of the trench abutting the source, body, and drain regions, the body region having a substantially constant doping concentration along the sidewall of the trench between the source and drain regions.

2. The method of claim 1 comprising forming a gate dielectric layer on the sidewall of the trench.

3. The method of claim 2 comprising forming a gate electrode in the trench adjacent the gate dielectric.

4. The method of claim 3 comprising:

forming the gate electrode of polysilicon; and

doping the gate electrode in situ.

5. The method of claim 1 wherein the dopant atoms implanted with the fourth implantation energy form a deep body region of the trench MOSFET.

6. The method of claim 1 wherein the trench MOSFET is a PMOS transistor.

7. The method of claim 1 wherein the trench is deeper than 1.5 μm.

8. A trench MOSFET comprising:

a drain region in a semiconductor substrate;

a body region in the semiconductor substrate above the drain region;

a deep body region that includes dopant atoms;

a source region in the semiconductor substrate above the body region; and

a trench in the semiconductor substrate, a sidewall of the trench abutting the source, body, and drain regions, the body region having a substantially constant doping concentration along the sidewall of the trench between the source and drain regions.

9. The trench MOSFET of claim 8 comprising a gate dielectric layer on the sidewall of the trench.

10. The trench MOSFET of claim 9 comprising a gate electrode in the trench adjacent the gate dielectric.

11. The trench MOSFET of claim 10 wherein the trench MOSFET is a P channel transistor and the gate electrode is polysilicon.

12. The trench MOSFET of claim 10 wherein the polysilicon is doped with N type dopant atoms.

13. The trench MOSFET of claim 8 wherein the trench is deeper than 1.5 μm.

14. A method comprising:

forming a drain region in a semiconductor substrate by implanting P type dopant ions into the semiconductor substrate;

forming a body region in the semiconductor substrate above the drain region by implanting N type dopant ions into the semiconductor substrate;

forming a deep body region in the semiconductor substrate by implanting additional N type dopant ions into the semiconductor substrate,

forming a source region in the semiconductor substrate by implanting P type dopant atoms in the semiconductor substrate above the body region;

forming a trench in the semiconductor substrate, a sidewall of the trench abutting the source, body, and drain regions, the body region having a substantially constant doping concentration along the sidewall of the trench between the source and drain regions;

filling the trench with a gate electrode; and

doping the gate electrode with N type dopant atoms.

15. The method of claim 14 wherein doping the gate electrode comprises doping the gate electrode in situ.

16. The method of claim 14 wherein the dopant atoms are implanted to form a deep body region of the trench MOSFET.

17. The method of claim 14 wherein the trench is deeper than 1.5 μm.