IP Library Granted Patent US 9,274,275
Granted Patent B2
US 9,274,275 · App. 13/935,277 · Granted Mar 1, 2016

Photonic integration platform

Inventors: Mark Webster (Bethlehem, PA); Ravi Sekhar Tummidi (Breinigsville, PA)
Assignee: Cisco Technology, Inc.
G02B6/122G02B6/12G02B6/1228G02B6/305G02B6/107G02B6/12002G02B6/132G02B6/43G02B2006/12038G02B2006/12061G02B2006/12147G02B2006/12152
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,274,275
App. No.
13/935,277
Granted
Mar 1, 2016
Kind
B2
Abstract

A SOI device may include a waveguide adapter that couples light between an external light source—e.g., a fiber optic cable or laser—and a silicon waveguide on the silicon surface layer of the SOI device. In one embodiment, the waveguide adapter is embedded into the insulator layer. Doing so may enable the waveguide adapter to be formed before the surface layer components are added onto the SOI device. Accordingly, fabrication techniques that use high-temperatures may be used without harming other components in the SOI device—e.g., the waveguide adapter is formed before heat-sensitive components are added to the silicon surface layer.

Claims (18)

1. A method comprising:

forming a first waveguide in an insulation layer of an optical device, wherein the first waveguide comprises a waveguide adapter in the insulation layer, the waveguide adapter comprising multiple prongs exposed at an external coupling surface of the optical device, the external coupling surface is configured to couple to an external light source;

after forming the first waveguide, disposing a crystalline semiconductor layer on the insulation layer; and

forming a second waveguide in the semiconductor layer, wherein the second waveguide at least partially overlaps the first waveguide in the insulation layer.

2. The method of claim 1 , wherein the waveguide adapter comprises a first prong that is disposed above a second prong in the insulation layer relative to a substrate on which the insulation layer is disposed, and wherein a dimension of the second prong decreases as the second prong extends away from the external coupling surface and a dimension of the first prong increases as the first prong extends away from the external coupling surface.

3. The method of claim 1 , further comprising:

forming a substrate on which the insulation layer is disposed of the optical device to include a groove configured to passively align the external light source at the external coupling surface to introduce light into the multiple prongs of the waveguide adapter.

4. The method of claim 1 , wherein the first and second waveguides are spaced apart no more than 500 nanometers where the first and second waveguides overlap.

5. The method of claim 1 , wherein the optical device comprises a silicon-on-insulator structure, wherein a substrate on which the insulation layer is disposed is crystalline silicon, the insulation layer is silicon type insulator, and the semiconductor layer is crystalline silicon, and

wherein the first waveguide comprises one of silicon oxynitride and silicon nitride and the second waveguide comprises crystalline silicon.

6. A method comprising:

forming a first waveguide in an insulation layer of an optical device;

after forming the first waveguide, disposing a crystalline semiconductor layer on the insulation layer; and

forming a second waveguide in the semiconductor layer, wherein the second waveguide at least partially overlaps the first waveguide in the insulation layer, wherein at least a portion of the first waveguide and a portion of the second waveguide are tapered where the first and second waveguides overlap in the optical device.

7. A method comprising:

forming a first waveguide in an insulation layer of an optical device, wherein the insulation layer completely surrounds the first waveguide;

after forming the first waveguide, disposing a crystalline semiconductor layer on the insulation layer; and

forming a second waveguide in the semiconductor layer, wherein the second waveguide at least partially overlaps the first waveguide in the insulation layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 3, 2013
From: WEBSTER, MARK; TUMMIDI, RAVI SEKHAR
To: CISCO TECHNOLOGY, INC.
Reel/Frame 030739/0296 →
Continuity (1)
Related Publication 20150010266A1 · Jan 8, 2015