IP Library Granted Patent US 9,275,576
Granted Patent B2
US 9,275,576 · App. 13/937,586 · Granted Mar 1, 2016

Power consumption detection apparatus, power consumption control apparatus, image processing apparatus, self-luminous display apparatus, electronic device, power consumption detection method, power consumption control method, power consumption control method, and computer program

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Quick Facts
Patent No.
US 9,275,576
App. No.
13/937,586
Granted
Mar 1, 2016
Kind
B2
Abstract

An image processing apparatus is disclosed. The image processing apparatus includes a display panel and comprises a control section configured to control a duty pulse width for controlling an illumination period within a horizontal line period on a timing synchronized with a horizontal synchronization pulse.

Claims (20)

1. An image processing apparatus including a display panel having display pixels, comprising:

a control section configured to control a width of a duty pulse for controlling an illumination period of a light emitting element in one of the display pixels within a horizontal line period at a timing synchronized with a horizontal synchronization pulse; and

a calculation section configured to calculate power consumed by the display panel in the horizontal line period,

wherein the control section is configured to switch a first duty pulse having a first illumination period and a second duty pulse having a second illumination period different from the first illumination period based on the calculated power.

2. The image processing apparatus according to claim 1 , wherein the illumination period is maintained at 20% of the horizontal line period.

3. The image processing apparatus according to claim 1 , wherein the illumination period is maintained at 35% of the horizontal line period.

4. The image processing apparatus according to claim 1 , wherein the illumination period is maintained at 40% of the horizontal line period.

5. The image processing apparatus according to claim 1 , wherein the power consumed by the display panel is calculated by multiplying a panel current value by a power supply voltage value of the display panel.

6. The image processing apparatus according to claim 1 , wherein the display panel has self-luminous elements and pixel circuits forming a matrix.

7. The image processing apparatus according to claim 1 , wherein the duty pulse comprises a low level and a high level, and a length of the low level controls a length of the illumination period.

8. An electronic device including a display panel having display pixels, comprising:

a control section configured to control a width of a duty pulse for controlling an illumination period of a light emitting element in one of the display pixels within a horizontal line period at a timing synchronized with a horizontal synchronization pulse; and

a calculation section configured to calculate power consumed by the display panel in the horizontal line period,

wherein the control section is configured to switch a first duty pulse having a first illumination period and a second duty pulse having a second illumination period different from the first illumination period based on the calculated power.

9. The electronic device according to claim 8 , wherein the illumination period is maintained at 20% of the horizontal line period.

10. The electronic device according to claim 8 , wherein the illumination period is maintained at 35% of the horizontal line period.

11. The electronic device according to claim 8 , wherein the illumination period is maintained at 40% of the horizontal line period.

12. The electronic device according to claim 8 , wherein the power consumed by the display panel is calculated by multiplying a panel current value by a power supply voltage value of the display panel.

13. The electronic device according to claim 8 , wherein the display panel has self-luminous elements and pixel circuits forming a matrix.

14. The electronic device according to claim 8 , wherein the duty pulse comprises a low level and a high level, and a length of the low level controls a length of the illumination period.

Assignments (5)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 18, 2025
From: JDI DESIGN AND DEVELOPMENT G.K.
To: MAGNOLIA BLUE CORPORATION
Reel/Frame 072039/0656 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 31, 2024
From: JOLED, INC.
To: JDI DESIGN AND DEVELOPMENT G.K.
Reel/Frame 066382/0619 →
CORRECTION BY AFFIDAVIT FILED AGAINST REEL/FRAME 063396/0671 Recorded Jun 12, 2023
From: JOLED, INC.
To: JOLED, INC.
Reel/Frame 064067/0723 →
SECURITY INTEREST Recorded Apr 20, 2023
From: JOLED, INC.
To: INCJ, LTD.
Reel/Frame 063396/0671 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 10, 2015
From: SONY CORPORATION
To: JOLED INC.
Reel/Frame 036090/0968 →