Enhanced recovery mechanisms

1. A method, comprising:

setting an operating parameter for a power rail, wherein the operating parameter comprises a power value;

releasing, with a power management circuit, a processor to start;

storing a default operating parameter for the power rail, wherein the default operating parameter comprises a default power value;

receiving a runtime operating parameter for the power rail and modifying the operating parameter for the power rail according to the runtime operating parameter, wherein the runtime operating parameter comprises a runtime power value; and

in response to a reset control signal from the processor, transitioning the operating parameter for the power rail from the runtime operating parameter to the default operating parameter, wherein the transitioning comprises transitioning the power value for the power rail from the runtime power value to the default power value, and wherein the power value for the power rail is maintained at a value greater than zero throughout the transition.

2. The method according to claim 1 , wherein setting the operating parameter for the power rail comprises setting a predetermined programmed setting for the power rail.

3. The method according to claim 1 , wherein storing the default operating parameter comprises storing a plurality of default operating parameters.

4. The method according to claim 3 , wherein transitioning the operating parameter for the power rail comprises modifying a plurality of power rails according to the plurality of default operating parameters.

5. The method according to claim 1 , further comprising, in response to the reset control signal from the processor, resetting a serial interface between the power management circuit and the processor.

6. The method according to claim 1 , further comprising:

sending an interrupt to the processor based upon a power on key press; and

when a response to the interrupt is not received while the power on key press continues for a predetermined time, sending a second interrupt to the processor.

7. The method according to claim 6 , further comprising, when a response to the interrupt is received, communicating with the processor to receive system status parameter data.

8. The method according to claim 6 , further comprising, when a response to the second interrupt is not received while the power on key press continues for a second predetermined time, resetting at least one of the processor or the power management circuit.

9. A system, comprising:

a processor; and

a power management circuit configured to:

set an operating parameter for a first power rail;

release the processor to start;

receive a default operating parameter for the first power rail from the processor and store the default operating parameter;

receive a respective runtime operating parameter for each of the first power rail and a plurality of second power rails;

modify the operating parameter for the first power rail according to the respective runtime operating parameter;

set operating parameters for each of the plurality of second power rails according to the respective runtime operating parameter; and

in response to a reset control signal from the processor, transition a power value for the first power rail from the respective runtime operating parameter for the first power rail to the default operating parameter for the first power rail, wherein the power value for the first power rail is maintained at a value greater than zero throughout the transition.

10. The system according to claim 9 , wherein the power management circuit is further configured to:

send an interrupt to the processor based upon a power on key press; and

send a second interrupt to the processor when a response to the interrupt is not received while the power on key press continues for a predetermined time.

11. The system according to claim 10 , wherein the power management circuit is further configured to:

communicate with the processor to receive system status parameter data when a response to the interrupt is received; and

reset at least one of the processor or the power management circuit when a response to the second interrupt is not received while the power on key press continues for a second predetermined time.

12. A method, comprising:

releasing, with a power management circuit, a processor to start;

receiving and storing a default operating parameter for a power rail from the processor, the default operating parameter comprising a default power value;

receiving a runtime operating parameter for the power rail and modifying an operating parameter for the power rail according to the runtime operating parameter, the runtime operating parameter comprising a runtime power value; and

in response to a reset control signal from the processor, transitioning the operating parameter for the power rail from the runtime operating parameter to the default operating parameter, wherein the transitioning comprises transitioning a power value for the power rail from the runtime power value to the default power value, and wherein the power value for the power rail is maintained at a value greater than zero throughout the transition.

13. The method according to claim 12 , wherein storing the default operating parameter comprises storing a plurality of default operating parameters.

14. The method according to claim 13 , wherein transitioning the operating parameter for the power rail comprises transitioning a plurality of power rails according to the plurality of default operating parameters.

15. The method according to claim 12 , further comprising, in response to the reset control signal from the processor, resetting a serial interface between the power management circuit and the processor.

16. The method according to claim 12 , further comprising:

sending an interrupt to the processor based upon a power on key press; and

when a response to the interrupt is not received while the power on key press continues for a predetermined time, sending a second interrupt to the processor.

17. The method according to claim 16 , further comprising, when a response to the second interrupt is not received while the power on key press continues for a second predetermined time, resetting at least one of the processor or the power management circuit.

18. The method of claim 1 , wherein setting the operating parameter comprises writing data to an operating register associated with the power rail, the data including a power mode bit entry.

19. The system of claim 9 , wherein:

the processor is further configured to:

detect an error condition associated with at least one component of the system;

determine at least one power rail among the first power rail or the plurality of second power rails that is associated with the at least one component; and

generate a control signal to cause transition of the determined at least one power rail from the respective runtime operating parameter for the at least one power rail to a default operating parameter for the at least one power rail.

20. The method of claim 1 , further comprising writing data bits indicative of the runtime power value to an operating register associated with the power rail, wherein modifying the operating parameter comprises modifying the power value for the power rail based on the runtime power value in the operating register.