Semiconductor device and manufacturing method of same
View Patent ↗An semiconductor device includes a semiconductor substrate; a metal layer arranged above the semiconductor substrate; a first passivation film that contacts at least a portion of one side surface of the metal layer; and a second passivation film that is arranged extending from the first passivation film to the metal layer, and contacts an upper surface of the first passivation film, and contacts at least a portion of an upper surface of the metal layer.
1. A semiconductor device manufacturing method comprising:
forming a metal layer above a semiconductor substrate;
forming a first passivation film that contacts a top surface of the metal layer and at least a portion of one side surface of the metal layer;
removing a first portion of the first passivation film that is on the top surface of the metal layer such that the top surface of the metal layer is exposed;
baking the first passivation film such that (i) an upper surface of the first passivation film becomes lower than the top surface of the metal layer, and (ii) a second portion of the first passivation film is in contact with the one side surface of the metal layer; and
after baking the first passivation film, forming a second passivation film extending from the first passivation film to the metal layer, the second passivation film contacting the upper surface of the first passivation film and at least a portion of the upper surface of the metal layer,
wherein a linear expansion coefficient of the metal layer is greater than a linear expansion coefficient of the second passivation film, and a linear expansion coefficient of the first passivation film is greater than the linear expansion coefficient of the second passivation film.
2. The method according to claim 1 , wherein the first passivation film includes a polyimide.
3. The method according to claim 1 , wherein the second passivation film is semiconductive.
4. The method according to claim 1 , further comprising forming a peripheral voltage-resistant region at an outer peripheral portion of the semiconductor substrate, wherein the second passivation film is positioned in the peripheral voltage-resistant region.
5. The method according to claim 1 , wherein the second passivation film is a two-layered structure.
6. The method according to claim 1 , wherein the first passivation film has a thickness in a first direction that is greater than a height of a portion of the second passivation film that contacts the portion of the upper surface of the metal layer.