IP Library Granted Patent US 9,460,014
Granted Patent B2
US 9,460,014 · App. 13/960,049 · Granted Oct 4, 2016

Sharing local cache from a failover node

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Quick Facts
Patent No.
US 9,460,014
App. No.
13/960,049
Granted
Oct 4, 2016
Kind
B2
Abstract

Sharing local cache from a failover node, including: determining, by a managing compute node, whether a first compute node and a second compute node each have a local cache, where the second compute node is a mirrored copy of the first compute node; responsive to determining that the first compute node and the second compute node each have a local cache, combining, by the managing compute node, local cache on the first compute node and local cache on the second compute node into unified logical cache; receiving, by the managing compute node, a memory access request; and sending, by the managing compute node, the memory access request to an appropriate local cache in the unified logical cache.

Claims (12)

1. A method comprising:

by program instructions on a computing device,

determining whether a first compute node and a failover compute node each have an internal cache, wherein the failover compute node is functioning as a mirrored copy of the first compute node;

responsive to determining that the first compute node and the failover compute node each have an internal cache, combining into a unified logical cache, a first internal cache of the first compute node and a second internal cache of the failover compute node;

receiving a memory access request; and

sending the memory access request to one of the internal caches in the unified logical cache including:

determining whether the unified logical cache includes data requested by the memory access request; and

responsive to determining that the unified logical cache includes data requested by the memory access request:

servicing the memory access request using non-cache memory on the first compute node, including reading data stored at a location in non-cache memory specified in the memory access request; and

writing the data to a location in the unified logical cache in dependence upon a predetermined cache replacement policy.

2. The method of claim 1 wherein writing the data to a location in the unified logical cache in dependence upon a predetermined cache replacement policy further comprises selecting one of the internal caches for receiving the data.

3. The method of claim 1 wherein the memory access request includes a memory address specifying a location in memory to read data from.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 10, 2014
From: INTERNATIONAL BUSINESS MACHINES CORPORATION
To: LENOVO ENTERPRISE SOLUTIONS (SINGAPORE) PTE. LTD.
Reel/Frame 034194/0111 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 6, 2013
From: CUDAK, GARY D.; DO, LYDIA M.; HARDEE, CHRISTOPHER J.; ROBERTS, ADAM
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 030949/0739 →