IP Library Granted Patent US 9,548,948
Granted Patent B2
US 9,548,948 · App. 13/963,260 · Granted Jan 17, 2017

Input current cancellation scheme for fast channel switching systems

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Quick Facts
Patent No.
US 9,548,948
App. No.
13/963,260
Granted
Jan 17, 2017
Kind
B2
Abstract

A multichannel system, including a multiplexer having inputs for a plurality of input channels, and a pre-charge buffer having a plurality of inputs coupled to an input of the multiplexer, and an output coupled to a multiplexer output. The multichannel system may stand alone, or may be coupled to a receiving circuit having an input coupled to an output of the multiplexer. In some instances, the receiving circuit is an analog to digital converter.

Claims (30)

1. A multichannel system, comprising:

a multiplexer having inputs for a plurality of analog input channels; and

a pre-charge buffer having a plurality of inputs coupled to the plurality of analog input channels, and an output coupled to a multiplexer output, wherein the pre-charge buffer is configured to pre-charge the multiplexer output to an analog input voltage of an analog input channel prior to the multiplexer switching to the analog input channel.

2. The multichannel system according to claim 1 , wherein the pre-charge buffer charges the multiplexer output to a next channel input voltage during an interstitial phase between successive multiplexer connections.

3. The multichannel system according to claim 2 , wherein the multiplexer output is charged before the multiplexer switches to the next channel.

4. The multichannel system according to claim 1 , wherein each of the plurality of analog input channels is multiplexed sequentially.

5. The multichannel system according to claim 1 , wherein each of plurality of analog input channels is multiplexed in a predetermined order.

6. The multichannel system according to claim 1 , wherein the pre-charge buffer is an operational amplifier.

7. The multichannel system according to claim 1 , wherein the pre-charge buffer is an operational trans-conductance amplifier.

8. The multichannel system according to claim 1 , further comprising a receiving circuit having an input coupled to the multiplexer output.

9. The multichannel system according to claim 8 , wherein the receiving circuit is an analog to digital converter.

10. The multichannel system according to claim 8 , further comprising an amplifier disposed between the multiplexer output and an input of the receiving circuit.

11. The multichannel system according to claim 10 , wherein the amplifier is a unity gain amplifier.

12. The multichannel system according to claim 10 , wherein the amplifier is a programmable gain amplifier.

13. The multichannel system according to claim 1 , further comprising a second multiplexer disposed between the plurality of input channels and the pre-charge buffer.

14. A method for operating a multichannel system, comprising:

receiving, at a multiplexer, a plurality of analog inputs from a plurality of analog input channels; and

pre-charging an output of the multiplexer to an analog input voltage of an analog channel input channel prior to the multiplexer switching to the analog input channel using a pre-charge buffer circuit.

15. The method according to claim 14 , wherein the pre-charge buffer charges the multiplexer output to a next channel input voltage during an interstitial phase between successive multiplexer connections.

16. The method according to claim 15 , wherein the multiplexer output is charged before the multiplexer switches to the next channel.

17. The method according to claim 14 , wherein each of the plurality of analog input channels is multiplexed sequentially.

18. The method according to claim 14 , wherein each of the plurality of analog input channels is multiplexed in a predetermined order.

19. The method according to claim 14 , wherein the pre-charge buffer is an operational amplifier.

20. The method according to claim 14 , wherein the pre-charge buffer is an operational trans-conductance amplifier.

21. The method according to claim 14 , wherein the output of the multiplexer is coupled to a receiving circuit.

22. The method according to claim 21 , wherein the receiving circuit is an analog to digital converter.

23. The method according to claim 21 , wherein an amplifier is disposed between the output of the multiplexer and an input of the receiving circuit.

24. The method according to claim 23 , wherein the amplifier is a unity gain amplifier.

25. The method according to claim 23 , wherein the amplifier is a programmable gain amplifier.

26. The method according to claim 14 , wherein a second multiplexer is disposed between the plurality of input channels and the pre-charge buffer.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 25, 2022
From: ANALOG DEVICES GLOBAL UNLIMITED COMPANY
To: ANALOG DEVICES INTERNATIONAL UNLIMITED COMPANY
Reel/Frame 059102/0062 →
CHANGE OF NAME Recorded Feb 24, 2022
From: ANALOG DEVICES GLOBAL
To: ANALOG DEVICES GLOBAL UNLIMITED COMPANY
Reel/Frame 059090/0740 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 21, 2014
From: ANALOG DEVICES TECHNOLOGY
To: ANALOG DEVICES GLOBAL
Reel/Frame 034562/0710 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 14, 2013
From: MORA PUCHALT, GERARD; VYAS, BHARGAV R.; SHERRY, ADRIAN W.; MADAN, ARVIND
To: ANALOG DEVICES TECHNOLOGY
Reel/Frame 031011/0798 →