PCIE lane aggregation over a high speed link
View Patent ↗A computer network system configured with disaggregated inputs/outputs. This system can be configured in a leaf-spine architecture and can include a router coupled to a network source, a plurality of core switches coupled to the router, a plurality of aggregator switches coupled to each of the plurality of core switches, and a plurality of rack modules coupled to each of the plurality of aggregator switches. The plurality of rack modules can each include an I/O appliance with a downstream aggregator module, a plurality of server devices each with PCIe interfaces, and an upstream aggregator module that aggregates each of the PCIe interfaces. A high-speed link can be configured between the downstream and upstream aggregator modules via aggregation of many serial lanes to provide reliable high speed bit stream transport over long distances, which allows for better utilization of resources and scalability of memory capacity independent of the server count.
1. A computer network system, the system comprising:
an I/O appliance comprising:
a network processor;
a plurality of optical ports numbered from 1 to N;
a downstream aggregating silicon photonics device provided on each of the plurality of optical ports;
a SSD (Solid-State Drive) interface coupled to each of the optical ports;
a NIC (Network Interface Controller) interface coupled to each of the optical ports;
a top of rack switch coupled to each of the NIC interfaces;
a plurality of spine switches coupled to the top of rack switches; and
a plurality of server devices coupled to the I/O appliance, each of the server devices comprising:
a memory storage device;
a CPU (Central Processing Unit) device coupled to the memory storage device using a DDR interface;
a PCIe (Peripheral Component Interconnect Express) interface configured with the CPU device; and
an upstream aggregating silicon photonics device coupled to the plurality of server devices and aggregating each of the PCIe interfaces.
2. The system of claim 1 further comprising a twisted pair configured between the PCIe interfaces and the upstream aggregating silicon photonics device.
3. The system of claim 1 wherein the PCIe interface is configured to communicate at 8 Gbps.
4. The system of claim 1 wherein the PCIe interface is configured in a PAM format or a PAM-4 format.
5. The system of claim 1 wherein the I/O appliance is provided on a top rack spatial location.
6. The system of claim 1 wherein the downstream aggregating silicon photonics device and the upstream aggregating silicon photonics device are configured in a 1-to-1 mapping.
7. The system of claim 1 wherein a high-speed link is configured between the downstream aggregating silicon photonics device and the upstream aggregating silicon photonics device.
8. The system of claim 7 wherein the high speed link is configured with a transfer rate of greater than 24 Gbps or greater than 36 Gbps.
9. The system of claim 7 further comprising a pair of optical convertors coupled by an optical fiber configured between the upstream aggregating silicon photonics device and the downstream aggregating silicon photonics device.
10. A computer network system configured in a leaf-spine architecture, the system comprising:
a router coupled to a network source;
a plurality of core switches coupled to the router;
a plurality of aggregator switches coupled to each of the plurality of core switches; and
a plurality of rack modules coupled to each of the plurality of aggregator switches;
wherein each of the plurality of rack modules comprises:
an I/O (Input/Output) appliance including:
a network processor;
a plurality of optical ports numbered from 1 to N;
a routing element coupled to the plurality of optical ports;
a NIC (Network Interface Controller) interface coupled to the routing element;
a downstream aggregator module coupled to the NIC;
a top of rack switch coupled to each of the NIC interfaces;
a plurality of spine switches coupled to the top of rack switches; and
a memory storage controller coupled to the downstream aggregator module;
a plurality of server devices coupled to the I/O appliance, each of the server devices comprising:
a memory storage device;
a CPU (Central Processing Unit) device coupled to the memory storage device;
one or more memory modules coupled to the CPU device;
a PCIe (Peripheral Component Interconnect Express) interface configured with the CPU device; and
an upstream aggregator module coupled to the plurality of server devices and aggregating each of the PCIe interfaces.
11. The system of claim 10 wherein the upstream aggregator module is provided on a routing backplane within the rack module.
12. The system of claim 10 wherein the downstream aggregator module is coupled to one or more PCIe EP (End Point) modules.
13. The system of claim 12 wherein the downstream aggregator module and the one or more PCIe EP modules are integrated on a silicon material.
14. The system of claim 10 wherein the downstream aggregator module and the upstream aggregator module are configured in a 1-to-1 mapping.
15. The system of claim 10 wherein a high-speed link is configured between the downstream aggregator module and the upstream aggregator module.
16. The system of claim 15 wherein the high speed link is configured with a transfer rate of greater than 24 Gbps or greater than 36 Gbps.
17. The system of claim 15 further comprising a pair of optical convertors coupled by an optical fiber configured between the upstream aggregator module and the downstream aggregator module.
18. A computer network system configured in a leaf-spine architecture, the system comprising:
a router coupled to a network source;
a plurality of core switches coupled to the router;
a plurality of aggregator switches coupled to each of the plurality of core switches; and
a plurality of rack modules coupled to each of the plurality of aggregator switches, the plurality of rack modules having disaggregated I/O (Input/Output);
wherein each of the plurality of rack modules comprises:
an I/O appliance including:
a routing element;
a NIC (Network Interface Controller) interface coupled to the routing element;
a downstream aggregator module coupled to the NIC, the downstream aggregator module configured as a logical PCIe switch downstream port;
a top of rack switch coupled to each of the NIC interfaces;
a plurality of spine switches coupled to the top of rack switches; and
a plurality of server devices coupled to the I/O appliance, each of the server devices comprising:
a CPU (Central Processing Unit);
a PCIe (Peripheral Component Interconnect Express) interface configured with the CPU device; and
an upstream aggregator module coupled to the plurality of server devices and aggregating each of the PCIe interfaces, the upstream aggregator module configured as a logical PCIe switch upstream port.
19. The system of claim 18 wherein each logical PCIe switch downstream port is configured in a static 1-to-1 mapping with one PCIe switch upstream port.
20. The system of claim 18 wherein a high-speed link is configured between the downstream aggregator module and the upstream aggregator module.