IP Library Granted Patent US 9,111,920
Granted Patent B2
US 9,111,920 · App. 13/963,804 · Granted Aug 18, 2015

Semiconductor device

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Quick Facts
Patent No.
US 9,111,920
App. No.
13/963,804
Granted
Aug 18, 2015
Kind
B2
Abstract

A semiconductor device includes: a die pad comprised of a metal, and having at least one cutout portion in its peripheral edge portion, and a protruding portion formed by the cutout portion so as to protrude laterally from the peripheral edge portion; an inner lead having at its end a bonding pad that is placed in the cutout portion with an interval between the bonding pad and the die pad; a semiconductor chip held on the die pad so that a center position of the semiconductor chip is located on the protruding portion side with respect to a center position of the die pad; and a wire configured to electrically connect the semiconductor chip to the bonding pad.

Claims (44)

1. A semiconductor device, comprising:

a die pad comprised of a metal, and having at least one cutout portion in its peripheral edge portion, and a protruding portion formed by the cutout portion so as to protrude laterally from the peripheral edge portion;

a first inner lead having at its end a bonding pad that is placed in the cutout portion with an interval between the bonding, pad and the die pad;

a semiconductor chip held on the die pad so that a center position of the semiconductor chip is located on the protruding portion side with respect to a center position of the die pad; and

a wire configured to electrically connect the semiconductor chip to the bonding pad,

wherein the bonding pad has a first extended portion extending along a side surface of the die pad with an interval therebetween,

the side surface of the die pad extends from the cutout portion in a first direction,

the die pad further includes a suspension lead extending from the protruding portion,

a width of the protruding portion is greater than a width of the suspension lead,

the semiconductor chip is disposed on at least a portion of the protruding portion, and

in a plan view, a length of the first extended portion in the first direction is greater than a length of the side surface of the die pad in the first direction.

2. The semiconductor device of claim 1 , wherein a ground potential is applied to the die pad, and

a capacitive element portion is formed by the first extended portion and the side surface of the die pad.

3. The semiconductor device of claim 1 , wherein an upper surface of the die pad and an upper surface of the bonding pad are located at the same height from a lower surface of the die pad, and

the die pad has a greater thickness than the first inner lead.

4. The semiconductor device of claim wherein the cutout portion has a planar shape corresponding to two sides of a quadrilateral, one side of a triangle, a concave circular arc, or a convex circular arc.

5. The semiconductor device of claim 1 , wherein the suspension lead includes a bent portion.

6. The semiconductor device of claim 1 , wherein the first inner lead further includes a second extended portion physically connected to the bonding pad.

7. The semiconductor device of claim 6 , wherein the first extended portion extends parallel to the second extended portion in a plan view.

8. The semiconductor device of claim 6 , wherein the second extended portion includes a bent portion.

9. The semiconductor device of claim 6 , wherein the second extended portion extends from the bonding pad at an intermediate part of the bonding pad.

10. The semiconductor device of claim 6 , wherein the die pad further includes a suspension lead extending from the protruding portion.

11. The semiconductor device of claim 10 , wherein the suspension lead extends parallel to the second extended portion in a plan view.

12. The semiconductor device of claim 1 , wherein the first extended portion functions as an open-circuited stub.

13. The semiconductor device of claim 1 , wherein an end of the first extended portion and an end of the die pad arc aligned in a plan view.

14. The semiconductor device of claim 1 , wherein the first extended portion has a portion which is thicker than a portion oldie bonding pad placed in the cutout portion.

15. The semiconductor device of claim 1 , wherein the bonding pad and the first extended portion form an L-shape in a plan view.

16. The semiconductor device, of claim 1 , wherein the bonding pad extends in a first direction in a plan view, and the first extended portion extends in a second direction in a plan view, and

the second direction and the first direction are different.

17. A semiconductor device, comprising:

a die pad comprised ala metal, and having at least one cutout portion hi its peripheral edge portion, and a protruding portion formed by the cutout portion;

a first inner lead having a bonding pad that is placed in the cutout portion with an interval between the bonding pad and the die pad;

a semiconductor chip held on the die pad; and

a wire configured to electrically connect the semiconductor chip to the bonding pad,

wherein the bonding pad has a first extended portion extending along a side surface of the die pad with an interval therebetween,

the side surface of the die pad extends from the cutout portion in a first direction, and

in a plain view, a length of the first extended portion in the first direction is greater than a length of the side surface of the die pad in the first direction.

18. The semiconductor device of claim 17 , wherein the first inner lead further includes a second extended portion physically connected to the bonding pad.

19. The semiconductor device of claim 18 , wherein the second extended portion extends from the bonding pad at an intermediate part of the bonding pad.

20. The semiconductor device of claim 17 , wherein the bonding pad extends in a is direction in a plan view, and the first extended portion extends in a second direction in a plan view, and

the second direction and the first direction are different.

21. The semiconductor device of claim 17 , wherein a center position of the semiconductor chip is located on the protruding portion side with respect to a center position of the die pad.

22. The semiconductor device of claim 17 , wherein the die pad further includes a suspension lead extending from the protruding portion, and a width of the protruding portion is greater than a width of the suspension lead.

23. The semiconductor device of claim 17 , wherein the semiconductor chip is disposed on at least a portion of the protruding portion.

Assignments (3)
CORRECTIVE ASSIGNMENT TO CORRECT THE ERRONEOUSLY FILED APPLICATION NUMBERS 13/384239, 13/498734, 14/116681 AND 14/301144 PREVIOUSLY RECORDED ON REEL 034194 FRAME 0143. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Dec 24, 2020
From: PANASONIC CORPORATION
To: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
Reel/Frame 056788/0362 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 10, 2014
From: PANASONIC CORPORATION
To: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
Reel/Frame 034194/0143 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 5, 2014
From: NISHIJIMA, MASAAKI; TANAKA, TSUYOSHI
To: PANASONIC CORPORATION
Reel/Frame 032150/0955 →