IP Library Granted Patent US 8,803,588
Granted Patent B2
US 8,803,588 · App. 13/971,025 · Granted Aug 12, 2014

Temperature compensation circuit

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Quick Facts
Patent No.
US 8,803,588
App. No.
13/971,025
Granted
Aug 12, 2014
Kind
B2
Abstract

A temperature compensation circuit is disclosed. A temperature compensation circuit may include a temperature coefficient generator configured to generate a first signal and a second signal, wherein the first signal is proportional-to-absolute-temperature (ptat) and the second signal is negatively-proportional-to-absolute-temperature (ntat), a first programmable element configured to multiply at a first programmable ratio an amplitude of a third signal having a negative temperature coefficient from a first temperature to a second temperature, and a second programmable element configured to multiply at a second programmable ratio an amplitude of a fourth signal having a positive temperature coefficient from the second temperature to a third temperature.

Claims (60)

1. A temperature compensation circuit, comprising:

a temperature coefficient generator configured to generate a proportional-to-absolute-temperature (ptat) signal and a negatively-proportional-to-absolute-temperature (ntat) signal; and

a programmable temperature-coefficient combiner configured to output a temperature compensation signal having combined temperature coefficient based on a first programmable temperature coefficient across a first temperature range and a second programmable temperature coefficient across a second temperature range, the first and second programmable temperature coefficients each based on the ptat signal and the ntat signal.

2. The temperature compensation circuit of claim 1 , wherein the programmable temperature-coefficient combiner comprises:

a first programmable element configured to output a first signal having the first programmable temperature coefficient across the first temperature range based on the ptat signal and the ntat signal;

a second programmable element configured to output a second signal having the second programmable temperature coefficient across the second temperature range based on the ptat signal and the ntat signal; and

an amplifier, the amplifier including a first input terminal driven by the first signal, a second input terminal driven by the second signal, and an output terminal driving the temperature compensation signal.

3. The temperature compensation circuit of claim 1 , wherein the temperature coefficient generator comprises a bandgap circuit.

4. The temperature compensation circuit of claim 1 , wherein:

the ptat signal is a ptat current that is based at least on the difference between a first base-to-emitter voltage of a first bipolar junction transistor (BJT) having a first size and a second base-to-emitter voltage of a second BJT having a second size larger than the first size divided by a first resistor; and

the ntat signal is an ntat current that is based at least on the first base-to-emitter voltage of the first BJT divided by a second resistor.

5. The temperature compensation circuit of claim 1 , wherein:

the first temperature range spans from a first temperature to a second temperature;

the second temperature range spans from a third temperature to a fourth temperature; and

the third temperature is approximately equal to the second temperature.

6. The temperature compensation circuit of claim 2 , wherein:

the first programmable element is configured to have a first programmable size determined by a first control input; and

the second programmable element is configured to have a second programmable size determined by a second control input.

7. A phase-locked loop (PLL), comprising:

a voltage controlled oscillator (VCO); and

a temperature compensation circuit configured to generate a temperature compensation signal to control power supply to the VCO, the temperature compensation circuit comprising:

a temperature coefficient generator configured to generate a proportional-to-absolute-temperature (ptat) signal and a negatively-proportional-to-absolute-temperature (ntat) signal; and

a programmable temperature-coefficient combiner configured to output the temperature compensation signal having combined temperature coefficient based on a first programmable temperature coefficient across a first temperature range and a second programmable temperature coefficient across a second temperature range, the first and second programmable temperature coefficients each based on the ptat signal and the ntat signal.

8. The PLL of claim 7 , wherein the programmable temperature-coefficient combiner comprises:

a first programmable element configured to output a first signal having the first programmable temperature coefficient across the first temperature range based on the ptat signal and the ntat signal;

a second programmable element configured to output a second signal having the second programmable temperature coefficient across the second temperature range based on the ptat signal and the ntat signal; and

an amplifier, the amplifier including a first input terminal driven by the first signal, a second input terminal driven by the second signal, and an output terminal driving the temperature compensation signal.

9. The PLL of claim 7 , wherein the temperature coefficient generator comprises a bandgap circuit.

10. The PLL of claim 7 , wherein:

the ptat signal is a ptat current that is based at least on the difference between a first base-to-emitter voltage of a first bipolar junction transistor (BJT) having a first size and a second base-to-emitter voltage of a second BJT having a second size larger than the first size divided by a first resistor; and

the ntat signal is an ntat current that is based at least on the first base-to-emitter voltage of the first BJT divided by a second resistor.

11. The PLL of claim 7 , wherein:

the first temperature range spans from a first temperature to a second temperature;

the second temperature range spans from a third temperature to a fourth temperature; and

the third temperature is approximately equal to the second temperature.

12. The PLL of claim 7 , wherein:

the first programmable temperature coefficient is programmed to substantially offset a temperature coefficient of the VCO from the first temperature to the second temperature; and

the second programmable temperature coefficient is programmed to substantially offset the temperature coefficient of the VCO from the third temperature to the fourth temperature.

13. The PLL of claim 8 , wherein:

the first programmable element is configured to have a first programmable size determined by a first control input; and

the second programmable element is configured to have a second programmable size determined by a second control input.

14. The PLL of claim 13 , wherein the PLL is configured to be tuned to a frequency range based at least on a coarse tune signal.

15. The PLL of claim 14 , wherein the first control input is driven by a first control signal corresponding to the coarse tune signal, and the second control input is driven by a second control signal corresponding to the coarse tune signal.

16. A method, comprising:

generating a proportional-to-absolute-temperature (ptat) signal;

generating a negatively-proportional-to-absolute-temperature (ntat) signal; and

generating a temperature compensation signal having a combined temperature coefficient based on a first programmable temperature coefficient across a first temperature range and a second programmable temperature coefficient across a second temperature range, the first and second programmable temperature coefficients each based on the ptat signal and the ntat signal.

17. The method of claim 16 , further comprising:

generating a first signal having the first programmable temperature coefficient across the first temperature range based on the ptat signal and the ntat signal;

generating a second signal having the second programmable temperature coefficient across the second temperature range based on the ptat signal and the ntat signal; and

combining the first signal and the second signal to output the temperature compensation signal having the combined temperature coefficient.

18. The method of claim 17 , further comprising:

programming the first programmable temperature coefficient by setting a first programmable size of a first programmable element with a first control signal comprising at least a first bit; and

programming the second programmable temperature coefficient by setting a second programmable size of a second programmable element with a second control signal comprising at least a second bit.

19. The method of claim 16 , further comprising:

providing a regulated supply voltage to a voltage controlled oscillator (VCO) based at least on the temperature compensation signal; and

offsetting a temperature coefficient of the VCO across the first temperature range and the second temperature range with the combined temperature coefficient of the temperature compensation signal.

20. The method of claim 16 , wherein:

generating the ptat signal comprises generating a ptat current based on a bandgap circuit; and

generating the ntat signal comprises generating an ntat current based on the bandgap circuit.

Assignments (5)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 26, 2020
From: INTEL CORPORATION
To: APPLE INC.
Reel/Frame 053062/0703 →
CONFIRMATORY ASSIGNMENT Recorded Jun 25, 2020
From: INTEL IP CORPORATION
To: INTEL CORPORATION
Reel/Frame 053066/0388 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 17, 2014
From: NGUYEN, DARIN DUNG
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 032452/0683 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 17, 2014
From: FUJITSU SEMICONDUCTOR LIMITED
To: FUJITSU SEMICONDUCTOR WIRELESS PRODUCTS, INC.
Reel/Frame 032452/0762 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 17, 2014
From: FUJITSU SEMICONDUCTOR WIRELESS PRODUCTS, INC.
To: INTEL IP CORPORATION
Reel/Frame 032452/0833 →