IP Library Granted Patent US 9,251,898
Granted Patent B2
US 9,251,898 · App. 13/983,855 · Granted Feb 2, 2016

Method for programming nonvolatile memory element, method for initializing nonvolatile memory element, and nonvolatile memory device

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Quick Facts
Patent No.
US 9,251,898
App. No.
13/983,855
Granted
Feb 2, 2016
Kind
B2
Abstract

A method for programming a nonvolatile memory element includes: decreasing a resistance value of a variable resistance element in an initial state, by applying an initialization voltage pulse to a series circuit in which a load resistor having a first resistance value is connected in series with the variable resistance element and a MSM diode; applying, after the decreasing, a write voltage pulse to the series circuit after the resistance value of the variable resistance element is changed to a second resistance value lower than the first resistance value; and applying, after the decreasing, an erase voltage pulse to the series circuit after the resistance value of the variable resistance element is changed to a third resistance value lower than the first resistance value.

Claims (48)

1. A method for programming a nonvolatile memory element which includes a variable resistance element that is nonvolatile and a bidirectional diode that is connected in series with the variable resistance element,

wherein the nonvolatile memory element further includes a load resistor which is connected in series with the variable resistance element and whose resistance value can be changed, and

the variable resistance element includes: a first transition metal oxide layer comprising a first transition metal; and a second transition metal oxide layer comprising a second transition metal and having a lower degree of oxygen deficiency than the first transition metal oxide layer,

the method comprising:

decreasing a resistance value of the variable resistance element to be lower than a resistance value of the variable resistance element in an initial state, by applying an initialization voltage pulse to a series circuit in which the variable resistance element, the bidirectional diode, and the load resistor are connected in series, the resistance value of the variable resistance element in the initial state being higher than a resistance value of the variable resistance element in a high resistance state, and the load resistor having a first resistance value;

causing, after the decreasing, the variable resistance element to change from the high resistance state to a low resistance state in which the resistance value of the variable resistance element is lower than the resistance value of the variable resistance element in the high resistance state, by applying a write voltage pulse to the series circuit after a resistance value of the load resistor is changed to a second resistance value lower than the first resistance value, the write voltage pulse having a first polarity; and

causing, after the decreasing, the variable resistance element to change from the low resistance state to the high resistance state by applying an erase voltage pulse to the series circuit after a resistance value of the load resistor is changed to a third resistance value lower than the first resistance value, the erase voltage pulse having a second polarity opposite to the first polarity,

wherein in the decreasing, a divided voltage applied to the load resistor varies according to a current flowing through the bidirectional diode.

2. The method for programming a nonvolatile memory element according to claim 1 ,

wherein the bidirectional diode is a metal-semiconductor-metal (MSM) diode.

3. The method for programming a nonvolatile memory element according to claim 2 ,

wherein the MSM diode includes:

a first electrode and a second electrode; and

a semiconductor layer which comprises silicon nitride having a composition expressed as SiN z where 0<z≦0.7, is disposed between the first electrode and the second electrode, and forms a Schottky junction with each of the first electrode and the second electrode.

4. The method for programming a nonvolatile memory element according to claim 1 ,

wherein when a voltage is applied to both ends of a current steering element to pass the current, a breakdown current of the current steering element has a current density of 700 μA/μm 2 or more, the current steering element including series connection of the load resistor and the bidirectional diode.

5. The method for programming a nonvolatile memory element according to claim 1 ,

wherein when a voltage is applied to both ends of a current steering element to pass the current, the divided voltage applied to the load resistor is 70 mV or higher, the current steering element including series connection of the load resistor and the bidirectional diode.

6. The method for programming a nonvolatile memory element according to claim 1 ,

wherein the load resistor is 100Ω or more.

7. The method for programming a nonvolatile memory element according to claim 1 ,

wherein the first transition metal oxide layer comprises a tantalum oxide having a composition expressed as TaO x where 0.8≦x≦1.9, and

the second transition metal oxide layer comprises a tantalum oxide having a composition expressed as TaO y where 2.1≦y.

8. The method for programming a nonvolatile memory element according to claim 1 ,

wherein the first transition metal comprised in the first transition metal oxide layer has a higher standard electrode potential than the second transition metal comprised in the second transition metal oxide layer.

9. The method for programming a nonvolatile memory element according to claim 1 ,

wherein the first transition metal and the second transition metal are different transition metals.

10. The method for programming a nonvolatile memory element according to claim 1 ,

wherein the load resistor is provided for each of a plurality of the nonvolatile memory elements arranged in a matrix.

11. The method for programming a nonvolatile memory element according to claim 1 ,

wherein the load resistor is provided for each row or column of a plurality of the nonvolatile memory elements arranged in a matrix.

12. The method for programming a nonvolatile memory element according to claim 1 ,

wherein the bidirectional diode has a breakdown current which varies according to the resistance value of the load resistor.

13. The method for programming a nonvolatile memory element according to claim 1 ,

wherein the series connection of the load resistor with the variable resistance element reduces a breakdown current of the bidirectional diode in the initial state.

14. The method for programming a nonvolatile memory element according to claim 1 ,

wherein use of the load resistor prevents the bidirectional diode from being broken in the initial state.

15. The method for programming a nonvolatile memory element according to claim 1 ,

wherein initialization of the nonvolatile memory element in the initial state can be performed without breaking the bidirectional diode.

16. A method for initializing a nonvolatile memory element which allows, for the nonvolatile memory element including a variable resistance element that is nonvolatile and a bidirectional diode that is connected in series with the variable resistance element, the variable resistance element to reversibly change between a high resistance state and a low resistance state in which a resistance value of the variable resistance element is lower than a resistance value of the variable resistance element in the high resistance state, the variable resistance element being in an initial state in which a resistance value of the variable resistance element is higher than the resistance value of the variable resistance element in the high resistance state,

wherein the variable resistance element includes: a first transition metal oxide layer comprising a first transition metal; and a second transition metal oxide layer comprising a second transition metal and having a lower degree of oxygen deficiency than the first transition metal oxide layer,

the method comprising:

connecting a load resistor in series with the variable resistance element in the initial state and the bidirectional diode;

decreasing a resistance value of the variable resistance element to be lower than the resistance value of the variable resistance element in the initial state by applying an initialization voltage pulse to a series circuit in which the bidirectional diode, the variable resistance element, and the load resistor are connected in series; and

removing the load resistor from the bidirectional diode and the variable resistance element after the decreasing,

wherein in the decreasing, a divided voltage applied to the load resistor varies according to a current flowing through the bidirectional diode.

17. The nonvolatile memory device according to claim 16 ,

wherein the bidirectional diode has a breakdown current which varies according to the resistance value of the load resistor.

Assignments (4)
CORRECTIVE ASSIGNMENT TO CORRECT THE ERRONEOUSLY FILED APPLICATION NUMBERS 13/384239, 13/498734, 14/116681 AND 14/301144 PREVIOUSLY RECORDED ON REEL 034194 FRAME 0143. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Dec 24, 2020
From: PANASONIC CORPORATION
To: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
Reel/Frame 056788/0362 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 20, 2017
From: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
To: III HOLDINGS 12, LLC
Reel/Frame 042079/0796 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 10, 2014
From: PANASONIC CORPORATION
To: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
Reel/Frame 034194/0143 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 18, 2013
From: KATAYAMA, KOJI; TAKAGI, TAKESHI
To: PANASONIC CORPORATION
Reel/Frame 031429/0847 →