IP Library Granted Patent US 9,000,708
Granted Patent B2
US 9,000,708 · App. 13/990,933 · Granted Apr 7, 2015

Motor control circuit

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Quick Facts
Patent No.
US 9,000,708
App. No.
13/990,933
Granted
Apr 7, 2015
Kind
B2
Abstract

To provide a motor control circuit that variably controls the speed of a motor, in which an appropriate control gain corresponding to the speed of the motor that is set can be automatically set. The motor control circuit includes a period error signal output means, a speed error signal output means and a gain correction means.

Claims (15)

1. A motor control circuit in which a detection signal of a frequency that is proportional to a speed of a motor is input from a speed detection means attached to the motor, a reference signal having a frequency corresponding to a target speed is input from outside, and a period of the detection signal and a period of the reference signal are compared to variably control a speed of the motor,

the motor control circuit comprising:

a period error signal output means that outputs a period error signal corresponding to a difference between the period of the detection signal and the period of the reference signal;

a speed error signal output means that outputs a speed error signal obtained by multiplying the period error signal by a speed gain; and

a gain correction means that uses a ratio of a correction reference period relative to the period of the reference signal as a correction amount, and squares the correction amount and multiplies it by a predetermined speed gain of the speed error signal output means to correct the predetermined speed gain.

2. The motor control circuit according to claim 1 , further comprising a phase error signal output means that outputs a phase error signal obtained by multiplying a phase gain by a phase difference signal corresponding to a difference between a phase of the reference signal and a phase of the detection signal,

wherein the gain correction means multiplies the correction amount by a predetermined phase gain of the phase error signal output means to correct the predetermined phase gain.

3. The motor control circuit according to claim 2 , comprising:

a period detection counter into which the detection signal is input, the period detection counter outputting a detected period count value corresponding to a period of the detection signal counted based on a reference clock;

a period detection counter into which the reference signal is input, the period detection counter outputting a reference period count value corresponding to a period of the reference signal counted based on the reference clock; and

a phase detection counter into which the detection signal and the reference signal are input, the phase detection counter outputting a phase difference count value corresponding to a difference between a phase of the reference signal and a phase of the detection signal counted based on the reference clock,

wherein the period error signal output means has a difference calculation means that calculates the period error signal by differential calculation between the detected period count value and the reference period count value, and the gain correction means includes the correction reference period as a correction reference count value corresponding to the correction reference period, the gain correction means also including a division means that calculates the correction amount by dividing the correction reference count value by the reference period count value and a square calculation means that squares the calculated correction amount.

4. The motor control circuit according to claim 1 , wherein the gain control means has a plurality of the correction reference periods.

5. The motor control circuit according to claim 2 , wherein the gain control means has a plurality of the correction reference periods.

6. The motor control circuit according to claim 3 , wherein the gain control means has a plurality of the correction reference periods.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 5, 2020
From: MINEBEA CO., LTD.
To: MINEBEA MITSUMI INC.
Reel/Frame 051803/0293 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 6, 2018
From: PANASONIC CORPORATION
To: MINEBEA CO., LTD.
Reel/Frame 046277/0123 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 31, 2013
From: INOUE, TOMOHIRO; KISHIMOTO, KENICHI; HAMADA, YUJI
To: MINEBEA CO., LTD.; PANASONIC CORPORATION
Reel/Frame 030523/0870 →