IP Library Granted Patent US 9,183,379
Granted Patent B2
US 9,183,379 · App. 13/991,291 · Granted Nov 10, 2015

Preventing malicious instruction execution

Inventors: Xiaoning Li (Hillsboro, OR); William Wager (Hillsboro, OR); Nathan Bixler (Folsom, CA)
Assignee: Intel Corporation
G06F21/52G06F21/55
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Quick Facts
Patent No.
US 9,183,379
App. No.
13/991,291
Granted
Nov 10, 2015
Kind
B2
Abstract

Systems and techniques for preventing malicious instruction execution are described herein. A first instance of an instruction for a graphics processing unit (GPU) may be received. The instruction may be placed in a target list. A notification that the instruction caused a problem with the GPU may be received. The instruction may be moved from the target list to a black list in response to the notification. A second instance of the instruction may be received. The second instance of the instruction may be prevented from executing on the GPU in response to the instruction being on the black list.

Claims (43)

1. A device for preventing malicious instruction execution, the device comprising:

an instruction receipt module arranged to receive an instruction for a graphics processing unit (GPU) from a process;

a notification module arranged to receive a notification that the instruction caused a problem with the GPU;

a list management module arranged to:

place the instruction on a target list in response to the instruction's receipt by the instruction receipt module;

move the instruction from the target list to a blacklist in response to the notification; and

place an identifier of the process in the black list in response to the notification; and

an execution control module arranged to restrict access of the process to the GPU in response to the identifier of the process being on the black list, wherein to restrict access to the GPU includes preventing the instruction from executing on the GPU.

2. The device of claim 1 , wherein to restrict access of the process to the GPU includes the execution control module arranged to restrict access to a GPU resource for the process.

3. The device of claim 2 , wherein the GPU resource includes GPU memory.

4. The device of claim 3 , wherein to restrict access to the GPU memory includes the execution control module arranged to prevent a request to access an invalid memory address.

5. The device of claim 2 , wherein the GPU resource includes GPU instructions.

6. The device of claim 5 , wherein to restrict access to the GPU instructions includes the execution control module arranged to prevent an endless loop code piece from being received by the GPU.

7. The device of claim 5 , wherein to restrict access to the GPU instructions includes the execution control module arranged to prevent a faulty instruction from being received by the GPU, wherein the faulty instruction is a valid GPU instruction that causes the GPU an error when executed.

8. The device of claim 5 , wherein to restrict to the GPU instructions includes the execution control module arranged to prevent all instructions from the process from being received by the GPU.

9. The device of claim 1 , wherein the list management module is arranged to remove the identifier of the process from the black list after a policy configurable timeout period.

10. A non-transitory machine-readable medium including instructions, which when executed by a machine, cause the machine to perform operations for preventing malicious instruction execution, the operations comprising:

receiving an instruction for a graphics processing unit (GPU) from a process;

placing the instruction on a target list in response to receiving the instruction;

receiving a notification that the instruction caused a problem with the GPU;

moving the instruction from the target list to a blacklist in response to the notification;

placing an identifier of the process in the black list in response to the notification; and

restricting access of the process to the GPU in response to the identifier of the process being on the black list, wherein the restricting includes preventing the instruction from executing on the GPU.

11. The machine-readable medium of claim 10 , wherein restricting access of the process to the GPU includes restricting access to a GPU resource for the process.

12. The machine-readable medium of claim 11 , wherein the GPU resource includes GPU memory.

13. The machine-readable medium of claim 11 , wherein the GPU resource includes GPU instructions.

14. The machine-readable medium of claim 13 , wherein restricting access to the GPU instructions includes preventing an endless loop code piece from being received by the GPU.

15. The machine-readable medium of claim 13 , wherein restricting access to the GPU instructions includes preventing a faulty instruction from being received by the GPU, wherein the faulty instruction is a valid GPU instruction that causes the GPU an error when executed.

16. The machine-readable medium of claim 13 , wherein restricting access to the GPU instructions includes preventing all instructions from the process from being received by the GPU.

17. The machine-readable medium of claim 10 , wherein the operations comprise removing the identifier of the process from the black list after a policy configurable timeout period.

18. A method for preventing malicious instruction execution, the method comprising:

receiving an instruction for a graphics processing unit (GPU) from a process;

placing the instruction on a target list in response to receiving the instruction;

receiving a notification that the instruction caused a problem with the GPU;

moving the instruction from the target list to a blacklist in response to the notification;

placing an identifier of the process in the black list in response to the notification; and

restricting access of the process to the GPU in response to the identifier of the process being on the black list, wherein the restricting includes preventing the instruction from executing on the GPU.

19. The method of claim 18 , wherein restricting access of the process to the GPU includes restricting access to a GPU resource for the process.

20. The method of claim 19 , wherein the GPU resource includes GPU memory.

21. The method of claim 19 , wherein the GPU resource includes GPU instructions.

22. The method of claim 21 , wherein restricting access to the GPU instructions includes preventing an endless loop code piece from being received by the GPU.

23. The method of claim 21 , wherein restricting access to the GPU instructions includes preventing a faulty instruction from being received by the GPU, wherein the faulty instruction is a valid GPU instruction that causes the GPU an error when executed.

24. The method of claim 21 , wherein restricting access to the GPU instructions includes preventing all instructions from the process from being received by the GPU.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 4, 2014
From: LI, XIAONING; WAGER, WILLIAM; BIXLER, NATHAN
To: INTEL CORPORATION
Reel/Frame 033030/0719 →
Continuity (1)
Related Publication 20140310809A1 · Oct 16, 2014