Integrated circuit inductors
In order to reduce the inter-path capacitance of an inductor, an integrated circuit inductor design is provided in which the path crossings are designed such that the voltage differences between the adjacent paths in the loops are (in total) minimized.
1. An inductor comprising:
a conducting track arranged in two loops that form a figure of eight shape, each loop comprising at least two concentric paths, wherein the track length comprises tap regions at the ends of the tracks and a central track region which comprises the concentric paths of the loops, wherein the central track region comprises a sequence of track sections, each comprising a loop half turn, and crossings between tracks sections, with the crossings spaced along the central track region by one or two track sections, wherein the central track section has a parameter p defined as:
p=the sum of squares of normalised differences in track section sequence number for all adjacent pairs of track sections in each loop,
wherein the path crossings are at locations such that the parameter p is the minimum possible value of p.
2. An inductor as claimed in claim 1 , comprising n concentric paths per loop, and p=(n−1)(2n−1)/6n.
3. An inductor as claimed in claim 2 , wherein the track comprises two concentric paths in each of the two loops, and p=¼.
4. An inductor as claimed in claim 3 , wherein there are two crossings, one at the top and one at the bottom of the figure of eight shape.
5. An inductor as claimed in claim 3 , wherein a tap area is provided symmetrically between the two loops.
6. An inductor as claimed in claim 2 , wherein the track comprises three concentric paths in each loop, and p= 5/9.
7. An inductor as claimed in claim 6 , wherein there are four crossings, one at the top and one at the bottom of the figure of eight shape between the outermost pair of concentric paths, and two at the crossing area, one between the innermost pair of concentric paths in one loop and one between the innermost pair of concentric paths in the other loop.
8. An inductor as claimed in claim 6 , wherein a tap area is provided symmetrically between the two loops.
9. An inductor as claimed in claim 1 , wherein one loop of the figure of eight shape comprises a first consecutive set of said sequence of track sections and the other loop of the figure of eight shape comprises a second consecutive set of said sequence of track sections.
10. An inductor as claimed in claim 9 , wherein the first consecutive set of said sequence of track sections and the second consecutive set of said sequence of track sections are non-overlapping.
11. An inductor as claimed in claim 1 , wherein the midpoint of the central track region is between the two loops of the figure of eight shape.
12. An inductor as claimed in claim 11 , wherein a centre tap is connected to the central track region at the midpoint of the central track region.
13. An inductor as claimed in claim 1 , wherein the two loops of the figure of eight shape are horizontally distributed.
14. An inductor as claimed in claim 1 , wherein one loop of the figure of eight shape comprises a first consecutive set of said sequence of track sections and the other loop of the figure of eight shape comprises a second consecutive set of said sequence of track sections;
wherein the first consecutive set of said sequence of track sections and the second consecutive set of said sequence of track sections are non-overlapping;
wherein the midpoint of the central track region is between the two loops of the figure of eight shape; and
wherein a centre tap is connected to the central track region at the midpoint of the central track region.