IP Library Granted Patent US 9,043,681
Granted Patent B2
US 9,043,681 · App. 13/996,151 · Granted May 26, 2015

Reconstructing codewords using a side channel

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Quick Facts
Patent No.
US 9,043,681
App. No.
13/996,151
Granted
May 26, 2015
Kind
B2
Abstract

Embodiments of the present disclosure describe device, methods, computer-readable media and system configurations for decoding codewords using a side channel. In various embodiments, a memory controller may be configured to determine that m of n die of non-volatile memory (“NVM”) have failed iterative decoding. In various embodiments, the memory controller may be further configured to generate a side channel from n-m non-failed die and the m failed die other than a first failed die. In various embodiments, the memory controller may be further configured to reconstruct, using iterative decoding, a codeword stored on the first failed die of the m failed die based on the generated side channel and on soft input to an attempt to iteratively decode data stored on the first failed die. In various embodiments, the iterative decoding may include low-density parity-check decoding. Other embodiments may be described and/or claimed.

Claims (36)

1. An apparatus comprising

a memory controller configured to:

determine that m of n die have failed iterative decoding, m being an integer greater than 1 and n being a positive integer;

generate a side channel from n-m non-failed die and the m failed die other than a first failed die; and

reconstruct, using iterative decoding, a codeword stored on the first failed die of the m failed die based on the generated side channel and on soft input to an attempt to iteratively decode data stored on the first failed die.

2. The apparatus of claim 1 , wherein the iterative decoding comprises low-density parity-check decoding.

3. The apparatus of claim 1 , wherein the n-m non-failed die include an XOR die.

4. The apparatus of claim 1 , wherein the side channel comprises hard output of one or more successful attempts to iteratively decode data stored on the n-m non-failed die.

5. The apparatus of claim 1 , wherein the side channel comprises soft output of one or more successful attempts to iteratively decode data stored on the n-m non-failed die.

6. The apparatus of claim 1 , wherein the side channel comprises hard output of one or more unsuccessful attempts to iteratively decode data stored on the m failed die other than the first failed die.

7. The apparatus of claim 1 , wherein the side channel comprises soft output of one or more unsuccessful attempts to iteratively decode data stored on the m failed die other than the first failed die.

8. The apparatus of claim 1 , wherein the side channel further comprises soft input to one or more attempts to iteratively decode data stored on the m failed die other than the first failed die.

9. The apparatus of claim 1 , wherein the side channel further comprises hard input to one or more attempts to iteratively decode data stored on the m failed die other than the first failed die.

10. The apparatus of claim 1 , wherein the side channel comprises soft output of one or more unsuccessful attempts to iteratively decode data stored on the m failed die other than the first failed die, as well as information about trapping sets associated with the m failed die other than the first failed die.

11. A computer-implemented method, comprising:

determining, by a memory controller, that m of n die have failed iterative decoding, m being an integer greater than 1; and

reconstructing, by the memory controller, a codeword stored on a first failed die of the m failed die based on side channel generated from n-m non-failed die and the m failed die other than the first die, and on soft input to an attempt to iteratively decode data stored on the first failed die.

12. The computer-implemented method of claim 11 , wherein the iterative decoding comprises low-density parity-check decoding.

13. The computer-implemented method of claim 11 , wherein the n-m non-failed die include an XOR die.

14. The computer-implemented method of claim 11 , wherein the side channel comprises hard output or soft output of one or more successful attempts to iteratively decode data stored on the n-m non-failed die.

15. The computer-implemented method of claim 11 , wherein the side channel comprises hard output or soft output of one or more unsuccessful attempts to iteratively decode data stored on the m failed die other than the first failed die.

16. The computer-implemented method of claim 11 , wherein the side channel further comprises soft input or hard input to one or more attempts to iteratively decode data stored on the m failed die other than the first failed die.

17. The computer-implemented method of claim 11 , wherein the side channel comprises soft output of one or more unsuccessful attempts to iteratively decode data stored on the m failed die other than the first failed die, as well as information about trapping sets associated with the m failed die other than the first failed die.

18. A system, comprising:

n channels with data; and

an iterative decoder configured to:

determine that m of n channels have failed attempts to iteratively decode data stored thereon, m being an integer greater than 1;

generate a side channel from n-m non-failed channels and the m failed channels other than a first failed channel; and

reconstruct a codeword stored on the first failed channel of the m failed channels based on the generated side channel and on soft input to an attempt to iteratively decode data stored on the first failed channel.

19. The system of claim 18 , wherein the iterative decoder comprises a low-density parity-check decoder.

20. The system of claim 18 , wherein the n-m non-failed channels include an XOR channel.

21. The system of claim 18 , wherein the side channel comprises hard output or soft output of one or more successful attempts to iteratively decode data stored on the n-m non-failed channels.

22. The system of claim 18 , wherein the side channel comprises hard output or soft output of one or more unsuccessful attempts to iteratively decode data stored on the m failed channels other than the first failed channel.

23. The system of claim 18 , wherein the side channel further comprises soft input or hard input to one or more iterative attempts to iteratively decode data stored on the m failed channels other than the first failed channel.

24. The system of claim 18 , wherein the side channel comprises soft output of one or more unsuccessful attempts to iteratively decode data stored on the m failed channels other than the first failed channel, as well as information about trapping sets associated with the m failed channels other than the first failed channel.

25. The system of claim 18 , wherein the n channels comprise n die.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 19, 2023
From: INTEL CORPORATION
To: SK HYNIX NAND PRODUCT SOLUTIONS CORP.
Reel/Frame 062437/0255 →