IP Library Granted Patent US 9,252,189
Granted Patent B2
US 9,252,189 · App. 13/996,203 · Granted Feb 2, 2016

Nonvolatile semiconductor memory element, nonvolatile semiconductor memory device, and method for manufacturing nonvolatile semiconductor memory device

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,252,189
App. No.
13/996,203
Granted
Feb 2, 2016
Kind
B2
Abstract

A nonvolatile semiconductor memory element includes: a variable resistance element including a first electrode, a variable resistance layer, and a second electrode, and having a resistance value which changes according to a polarity of an electric pulse applied between the first electrode and the second electrode; and a current steering element which is electrically connected to the variable resistance element, allows a current to flow bidirectionally, and has a nonlinear current-voltage characteristic. The current steering element (i) has a structure in which a first current steering element electrode, a first current steering layer, and a second current steering element electrode are stacked in this order, and (ii) includes a second current steering layer which covers side surfaces of the first current steering element electrode, the first current steering layer, and the second current steering element electrode.

Claims (21)

1. A nonvolatile semiconductor memory element, comprising:

a variable resistance element including a first electrode, a variable resistance layer, and a second electrode, the variable resistance element having a resistance value which changes according to a polarity of an electric pulse applied between the first electrode and the second electrode; and

a current steering element which is electrically connected to the variable resistance element, allows a current to flow bidirectionally, and has a nonlinear current-voltage characteristic,

wherein the current steering element (i) has a structure in which a first current steering element electrode having a flat surface, a first current steering layer having a flat surface, and a second current steering element electrode having a flat surface are stacked in an order, from closest to farthest from the variable resistance element, of the first current steering element electrode, the first current steering layer and a second current steering element electrode, and (ii) includes a second current steering layer which is provided on an outer side surface of the first current steering layer, on at least a portion of an outer side surface of the first current steering element electrode, and on at least a portion of an outer side surface of the second current steering element electrode,

wherein each of the first current steering layer and the second current steering layer comprises nitrogen-deficient silicon nitride, and

when the nitrogen-deficient silicon nitride included in the first current steering layer is denoted as SiN z , and the nitrogen-deficient silicon nitride included in the second current steering layer is denoted as SiN w , a relationship

0.8≧z≧w≧0.3

is satisfied.

2. The nonvolatile semiconductor memory element according to claim 1 ,

wherein the variable resistance layer includes a first transition metal oxide layer and a second transition metal oxide layer which are stacked.

3. The nonvolatile semiconductor memory element according to claim 2 ,

wherein the second transition metal oxide layer has a degree of oxygen deficiency lower than a degree of oxygen deficiency of the first transition metal oxide layer.

4. The nonvolatile semiconductor memory element according to claim 2 ,

wherein a transition metal included in the first transition metal oxide layer and a transition metal included in the second transition metal oxide layer are a same transition metal.

5. The nonvolatile semiconductor memory element according to claim 2 ,

wherein a transition metal included in the first transition metal oxide layer and a transition metal included in the second transition metal oxide layer are different.

6. A nonvolatile semiconductor memory device, comprising:

a substrate;

lower electrode lines formed in a stripe pattern on the substrate;

upper layer electrode lines which are formed in a stripe pattern and three-dimensionally cross the lower electrode lines; and

a plurality of the nonvolatile semiconductor memory elements according to claim 1 formed at cross-points of the lower layer electrode lines and the upper layer electrode lines.

Assignments (4)
CORRECTIVE ASSIGNMENT TO CORRECT THE ERRONEOUSLY FILED APPLICATION NUMBERS 13/384239, 13/498734, 14/116681 AND 14/301144 PREVIOUSLY RECORDED ON REEL 034194 FRAME 0143. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Dec 24, 2020
From: PANASONIC CORPORATION
To: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
Reel/Frame 056788/0362 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 27, 2020
From: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
To: PANASONIC SEMICONDUCTOR SOLUTIONS CO., LTD.
Reel/Frame 052755/0870 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 10, 2014
From: PANASONIC CORPORATION
To: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
Reel/Frame 034194/0143 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 30, 2013
From: FUJII, SATORU; TSUJI, KIYOTAKA; MIKAWA, TAKUMI
To: PANASONIC CORPORATION
Reel/Frame 031304/0393 →